diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-09-12 14:18:49 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-09-29 20:20:50 +0000 |
| commit | ff4d6be9f99c34242140e965f1ed82240d67198c (patch) | |
| tree | 0a4cb2ea2539d4413eb5e1ec39d35a7dee95724d | |
| parent | 49c4584669cb854a1108b4ad9ac286aa607245c5 (diff) | |
*/include/cpu: use unsigned int for number of address bits
The number of physical address bits and reserved address bits shouldn't
ever be negative, so change the return type of cpu_phys_address_size,
get_reserved_phys_addr_bits, and get_tme_keyid_bits from int to unsigned
int.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I9e67db6bf0c38f743b50e7273449cc028de13a8c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78072
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
| -rw-r--r-- | src/arch/x86/cpu_common.c | 2 | ||||
| -rw-r--r-- | src/arch/x86/include/arch/cpu.h | 4 | ||||
| -rw-r--r-- | src/cpu/intel/common/common_init.c | 4 | ||||
| -rw-r--r-- | src/include/cpu/cpu.h | 2 |
4 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/x86/cpu_common.c b/src/arch/x86/cpu_common.c index 60ffd36c6e..9387f3bc76 100644 --- a/src/arch/x86/cpu_common.c +++ b/src/arch/x86/cpu_common.c @@ -44,7 +44,7 @@ unsigned int cpu_cpuid_extended_level(void) return cpuid_eax(0x80000000); } -int cpu_phys_address_size(void) +unsigned int cpu_phys_address_size(void) { if (!(cpu_have_cpuid())) return 32; diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index 96cf23bb76..b24cd23a96 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -317,10 +317,10 @@ size_t get_cache_size(const struct cpu_cache_info *info); bool fill_cpu_cache_info(uint8_t level, struct cpu_cache_info *info); #if CONFIG(CPU_INTEL_COMMON) -int get_reserved_phys_addr_bits(void); +unsigned int get_reserved_phys_addr_bits(void); #else /* Default implementation */ -static inline int get_reserved_phys_addr_bits(void) +static inline unsigned int get_reserved_phys_addr_bits(void) { /* Default implementation */ return 0; diff --git a/src/cpu/intel/common/common_init.c b/src/cpu/intel/common/common_init.c index ff00f0247f..55bc59eb75 100644 --- a/src/cpu/intel/common/common_init.c +++ b/src/cpu/intel/common/common_init.c @@ -248,7 +248,7 @@ bool is_tme_supported(void) * configured in the MSRs according to the capabilities and platform * configuration. For instance, after FSP-M. */ -static int get_tme_keyid_bits(void) +static unsigned int get_tme_keyid_bits(void) { msr_t msr; @@ -256,7 +256,7 @@ static int get_tme_keyid_bits(void) return msr.hi & TME_ACTIVATE_HI_KEYID_BITS_MASK; } -int get_reserved_phys_addr_bits(void) +unsigned int get_reserved_phys_addr_bits(void) { if (!is_tme_supported()) return 0; diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h index fc662eec9e..9783976191 100644 --- a/src/include/cpu/cpu.h +++ b/src/include/cpu/cpu.h @@ -9,7 +9,7 @@ void cpu_initialize(void); uintptr_t cpu_get_lapic_addr(void); struct bus; -int cpu_phys_address_size(void); +unsigned int cpu_phys_address_size(void); #if ENV_RAMSTAGE #define __cpu_driver __attribute__((used, __section__(".rodata.cpu_driver"))) |