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authorMichał Żygowski <michal.zygowski@3mdeb.com>2021-05-09 13:54:09 +0200
committerMichał Żygowski <michal.zygowski@3mdeb.com>2021-05-12 08:30:33 +0000
commitfb198c6b018d715a66096859ed089d0eef0cdf2d (patch)
tree8867a5b78cf638cd7c357660cc4c871cbca34f49
parentff7e2c86202084d4bbbdfd51a5b08331b8793364 (diff)
nb/amd/pi/00730F01: Use generic allocation functions for northbridge
Remove obsolete resource assigning functions. IO and MMIO address registers are currently set by amd_initcpuio to cover whole PCI hole under 4G to MMIO and IO 0x0000-0xFFFF is configured to be routed to southbridge already. Use generic PCI and resource allocation functions wherever possible to set northbridge resources. TEST=boot Debian with Linux 4.14 on apu2 4GB ECC and apu3 2GB no ECC Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I8dd5e40bce513c5ba7f1d42a06e7ab0846666942 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52926 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
-rw-r--r--src/northbridge/amd/pi/00730F01/northbridge.c239
1 files changed, 6 insertions, 233 deletions
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index e1ff95ad60..1d050b5b73 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -37,33 +37,6 @@ static struct device *__f2_dev[MAX_NODE_NUMS];
static struct device *__f4_dev[MAX_NODE_NUMS];
static unsigned int fx_devs = 0;
-static void set_io_addr_reg(struct device *dev, u32 nodeid, u32 linkn, u32 reg,
- u32 io_min, u32 io_max)
-{
- u32 i;
- u32 tempreg;
- /* io range allocation */
- tempreg = (nodeid&0xf) | ((nodeid & 0x30)<<(8-4)) | (linkn<<4) | ((io_max&0xf0)<<(12-4)); //limit
- for (i = 0; i < node_nums; i++)
- pci_write_config32(__f1_dev[i], reg+4, tempreg);
- tempreg = 3 /*| (3<<4)*/ | ((io_min&0xf0)<<(12-4)); //base :ISA and VGA ?
- for (i = 0; i < node_nums; i++)
- pci_write_config32(__f1_dev[i], reg, tempreg);
-}
-
-static void set_mmio_addr_reg(u32 nodeid, u32 linkn, u32 reg, u32 index, u32 mmio_min, u32 mmio_max, u32 nodes)
-{
- u32 i;
- u32 tempreg;
- /* io range allocation */
- tempreg = (nodeid&0xf) | (linkn<<4) | (mmio_max&0xffffff00); //limit
- for (i = 0; i < nodes; i++)
- pci_write_config32(__f1_dev[i], reg+4, tempreg);
- tempreg = 3 | (nodeid & 0x30) | (mmio_min&0xffffff00);
- for (i = 0; i < node_nums; i++)
- pci_write_config32(__f1_dev[i], reg, tempreg);
-}
-
static struct device *get_node_pci(u32 nodeid, u32 fn)
{
return pcidev_on_root(DEV_CDB + nodeid, fn);
@@ -152,148 +125,9 @@ static void set_vga_enable_reg(u32 nodeid, u32 linkn)
}
-/**
- * @return
- * @retval 2 resource does not exist, usable
- * @retval 0 resource exists, not usable
- * @retval 1 resource exist, resource has been allocated before
- */
-static int reg_useable(unsigned int reg, struct device *goal_dev,
- unsigned int goal_nodeid, unsigned int goal_link)
+static void nb_read_resources(struct device *dev)
{
struct resource *res;
- unsigned int nodeid, link = 0;
- int result;
- res = 0;
- for (nodeid = 0; !res && (nodeid < fx_devs); nodeid++) {
- struct device *dev;
- dev = __f0_dev[nodeid];
- if (!dev)
- continue;
- for (link = 0; !res && (link < 8); link++) {
- res = probe_resource(dev, IOINDEX(0x1000 + reg, link));
- }
- }
- result = 2;
- if (res) {
- result = 0;
- if ((goal_link == (link - 1)) &&
- (goal_nodeid == (nodeid - 1)) &&
- (res->flags <= 1)) {
- result = 1;
- }
- }
- return result;
-}
-
-static struct resource *amdfam16_find_iopair(struct device *dev,
- unsigned int nodeid, unsigned int link)
-{
- struct resource *resource;
- u32 free_reg, reg;
- resource = 0;
- free_reg = 0;
- for (reg = 0xc0; reg <= 0xd8; reg += 0x8) {
- int result;
- result = reg_useable(reg, dev, nodeid, link);
- if (result == 1) {
- /* I have been allocated this one */
- break;
- }
- else if (result > 1) {
- /* I have a free register pair */
- free_reg = reg;
- }
- }
- if (reg > 0xd8) {
- reg = free_reg; // if no free, the free_reg still be 0
- }
-
- resource = new_resource(dev, IOINDEX(0x1000 + reg, link));
-
- return resource;
-}
-
-static struct resource *amdfam16_find_mempair(struct device *dev, u32 nodeid, u32 link)
-{
- struct resource *resource;
- u32 free_reg, reg;
- resource = 0;
- free_reg = 0;
- for (reg = 0x80; reg <= 0xb8; reg += 0x8) {
- int result;
- result = reg_useable(reg, dev, nodeid, link);
- if (result == 1) {
- /* I have been allocated this one */
- break;
- }
- else if (result > 1) {
- /* I have a free register pair */
- free_reg = reg;
- }
- }
- if (reg > 0xb8) {
- reg = free_reg;
- }
-
- resource = new_resource(dev, IOINDEX(0x1000 + reg, link));
- return resource;
-}
-
-static void amdfam16_link_read_bases(struct device *dev, u32 nodeid, u32 link)
-{
- struct resource *resource;
-
- /* Initialize the io space constraints on the current bus */
- resource = amdfam16_find_iopair(dev, nodeid, link);
- if (resource) {
- u32 align;
- align = log2(HT_IO_HOST_ALIGN);
- resource->base = 0;
- resource->size = 0;
- resource->align = align;
- resource->gran = align;
- resource->limit = 0xffffUL;
- resource->flags = IORESOURCE_IO | IORESOURCE_BRIDGE;
- }
-
- /* Initialize the prefetchable memory constraints on the current bus */
- resource = amdfam16_find_mempair(dev, nodeid, link);
- if (resource) {
- resource->base = 0;
- resource->size = 0;
- resource->align = log2(HT_MEM_HOST_ALIGN);
- resource->gran = log2(HT_MEM_HOST_ALIGN);
- resource->limit = 0xffffffffffULL;
- resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
- resource->flags |= IORESOURCE_BRIDGE;
- }
-
- /* Initialize the memory constraints on the current bus */
- resource = amdfam16_find_mempair(dev, nodeid, link);
- if (resource) {
- resource->base = 0;
- resource->size = 0;
- resource->align = log2(HT_MEM_HOST_ALIGN);
- resource->gran = log2(HT_MEM_HOST_ALIGN);
- resource->limit = 0xffffffffffULL;
- resource->flags = IORESOURCE_MEM | IORESOURCE_BRIDGE;
- }
-
-}
-
-static void read_resources(struct device *dev)
-{
- u32 nodeid;
- struct bus *link;
- struct resource *res;
-
- nodeid = amdfam16_nodeid(dev);
- for (link = dev->link_list; link; link = link->next) {
- if (link->children) {
- amdfam16_link_read_bases(dev, nodeid, link->link_num);
- }
- }
/*
* This MMCONF resource must be reserved in the PCI domain.
@@ -309,57 +143,6 @@ static void read_resources(struct device *dev)
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
-static void set_resource(struct device *dev, struct resource *resource, u32 nodeid)
-{
- resource_t rbase, rend;
- unsigned int reg, link_num;
- char buf[50];
-
- /* Make certain the resource has actually been set */
- if (!(resource->flags & IORESOURCE_ASSIGNED)) {
- return;
- }
-
- /* If I have already stored this resource don't worry about it */
- if (resource->flags & IORESOURCE_STORED) {
- return;
- }
-
- /* Only handle PCI memory and IO resources */
- if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
- return;
-
- /* Ensure I am actually looking at a resource of function 1 */
- if ((resource->index & 0xffff) < 0x1000) {
- return;
- }
- /* Get the base address */
- rbase = resource->base;
-
- /* Get the limit (rounded up) */
- rend = resource_end(resource);
-
- /* Get the register and link */
- reg = resource->index & 0xfff; // 4k
- link_num = IOINDEX_LINK(resource->index);
-
- if (resource->flags & IORESOURCE_IO) {
- set_io_addr_reg(dev, nodeid, link_num, reg, rbase>>8, rend>>8);
- }
- else if (resource->flags & IORESOURCE_MEM) {
- set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, node_nums); // [39:8]
- }
- resource->flags |= IORESOURCE_STORED;
- snprintf(buf, sizeof(buf), " <node %x link %x>",
- nodeid, link_num);
- report_resource_stored(dev, resource, buf);
-}
-
-/**
- * I tried to reuse the resource allocation code in set_resource()
- * but it is too difficult to deal with the resource allocation magic.
- */
-
static void create_vga_resource(struct device *dev, unsigned int nodeid)
{
struct bus *link;
@@ -388,27 +171,16 @@ static void create_vga_resource(struct device *dev, unsigned int nodeid)
set_vga_enable_reg(nodeid, sblink);
}
-static void set_resources(struct device *dev)
+static void nb_set_resources(struct device *dev)
{
unsigned int nodeid;
- struct bus *bus;
- struct resource *res;
/* Find the nodeid */
nodeid = amdfam16_nodeid(dev);
create_vga_resource(dev, nodeid); //TODO: do we need this?
- /* Set each resource we have found */
- for (res = dev->resource_list; res; res = res->next) {
- set_resource(dev, res, nodeid);
- }
-
- for (bus = dev->link_list; bus; bus = bus->next) {
- if (bus->children) {
- assign_resources(bus);
- }
- }
+ pci_dev_set_resources(dev);
}
static void northbridge_init(struct device *dev)
@@ -850,10 +622,11 @@ static unsigned long agesa_write_acpi_tables(const struct device *device,
}
static struct device_operations northbridge_operations = {
- .read_resources = read_resources,
- .set_resources = set_resources,
+ .read_resources = nb_read_resources,
+ .set_resources = nb_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = northbridge_init,
+ .ops_pci = &pci_dev_ops_pci,
.acpi_fill_ssdt = northbridge_fill_ssdt_generator,
.write_acpi_tables = agesa_write_acpi_tables,
};