diff options
| author | Fred Reitberger <reitbergerfred@gmail.com> | 2022-12-02 16:03:05 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-06 19:43:24 +0000 |
| commit | f68bd1273b40e575ada18e0497a9dad626fe4a5c (patch) | |
| tree | 3398d1a19a1db8854ccd735ce5e92d8d7b0d7b47 | |
| parent | 5d029bbb90f63b6cfeb4198ba7b59ca3bf730b32 (diff) | |
mb/amd/birman/gpio: Change non-GEvent GPIOs to PAD_INT
Two GPIOs were set as SCI, but are not GEvent capable pins on morgana.
Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I00dc1b2595c047ce6898b394061d119ac8680755
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70282
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
| -rw-r--r-- | src/mainboard/amd/birman/early_gpio.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/birman/gpio.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/amd/birman/early_gpio.c b/src/mainboard/amd/birman/early_gpio.c index 89f7ef9679..a337e1ed4d 100644 --- a/src/mainboard/amd/birman/early_gpio.c +++ b/src/mainboard/amd/birman/early_gpio.c @@ -23,7 +23,7 @@ static const struct soc_amd_gpio gpio_set_stage_reset[] = { /* ESPI_ALERT_L */ PAD_NF(GPIO_22, ESPI_ALERT_D1, PULL_NONE), /* TPM IRQ */ - PAD_SCI(GPIO_130, PULL_UP, EDGE_LOW), + PAD_INT(GPIO_130, PULL_NONE, EDGE_LOW, STATUS_DELIVERY), /* SPI_ROM_REQ */ PAD_NF(GPIO_67, SPI_ROM_REQ, PULL_NONE), /* SPI_ROM_GNT */ diff --git a/src/mainboard/amd/birman/gpio.c b/src/mainboard/amd/birman/gpio.c index 50cf9db19c..d70fefd23b 100644 --- a/src/mainboard/amd/birman/gpio.c +++ b/src/mainboard/amd/birman/gpio.c @@ -65,7 +65,7 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { /* ESPI_CS_L */ PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE), /* INT_CLKREQ_L */ - PAD_SCI(GPIO_31, PULL_UP, EDGE_LOW), + PAD_INT(GPIO_31, PULL_NONE, EDGE_LOW, STATUS_DELIVERY), /* LPC_RST_L */ PAD_NF(GPIO_32, LPC_RST_L, PULL_NONE), /* GPIO_33 - GPIO_37: Not available */ @@ -138,7 +138,7 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { PAD_NF(GPIO_116, CLK_REQ2_L, PULL_NONE), /* GPIO_117 - GPIO_129: Not available */ /* TPM IRQ */ - PAD_SCI(GPIO_130, PULL_UP, EDGE_LOW), + PAD_INT(GPIO_130, PULL_NONE, EDGE_LOW, STATUS_DELIVERY), /* CLK_REQ3_L */ PAD_NF(GPIO_131, CLK_REQ3_L, PULL_NONE), /* CLK_REQ4_L */ |