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| author | Arthur Heymans <arthur@aheymans.xyz> | 2020-11-19 14:23:46 +0100 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2020-11-24 12:01:52 +0000 |
| commit | f4f332dba992212165b4d8b755a220d27c267c01 (patch) | |
| tree | ab25f30969b24a0f7e5c9d884625c3f5a4766c2f | |
| parent | b3b4ccfb26b88e7d78f15f2d62f9d46e4b1302ac (diff) | |
soc/intel/xeon_sp: Hook up the PMC driver
The soc code was already there but it was never linked.
Change-Id: I75ee08dab524bc40f1630612f93cbd42025b6d4e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47763
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/soc/intel/xeon_sp/Kconfig | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index 5c7a667d2f..ea38dfda01 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -50,6 +50,8 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL select SOC_INTEL_COMMON_BLOCK_PCR select SOC_INTEL_COMMON_BLOCK_P2SB + select SOC_INTEL_COMMON_BLOCK_PMC + select SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE select TSC_MONOTONIC_TIMER select UDELAY_TSC select SUPPORT_CPU_UCODE_IN_CBFS @@ -57,6 +59,8 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select FSP_CAR select NO_SMM + select ACPI_INTEL_HARDWARE_SLEEP_VALUES + select REG_SCRIPT config MAINBOARD_USES_FSP2_0 bool |