Remove few more warnings and some dead code.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5432 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

19 files changed, 57 insertions, 283 deletions

diff --git a/src/arch/i386/include/arch/acpi.h b/src/arch/i386/include/arch/acpi.h
index c8f9b00217..ebab54ca42 100644
--- a/src/arch/i386/include/arch/acpi.h
+++ b/src/arch/i386/include/arch/acpi.h
@@ -365,6 +365,9 @@ unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_ta
 void acpi_create_ssdt_generator(acpi_header_t *ssdt, const char *oem_table_id);
 void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs, void *dsdt);
 
+void update_ssdt(void* ssdt);
+void update_ssdtx(void* ssdtx, int i);
+
 /* These can be used by the target port */
 u8 acpi_checksum(u8 *table, u32 length);
 
diff --git a/src/mainboard/amd/dbm690t/acpi_tables.c b/src/mainboard/amd/dbm690t/acpi_tables.c
index 041f880695..9c6a9ea498 100644
--- a/src/mainboard/amd/dbm690t/acpi_tables.c
+++ b/src/mainboard/amd/dbm690t/acpi_tables.c
@@ -92,28 +92,6 @@ unsigned long acpi_fill_madt(unsigned long current)
 	return current;
 }
 
-static void update_ssdtx(void *ssdtx, int i)
-{
-	uint8_t *PCI;
-	uint8_t *HCIN;
-	uint8_t *UID;
-
-	PCI = ssdtx + 0x32;
-	HCIN = ssdtx + 0x39;
-	UID = ssdtx + 0x40;
-
-	if (i < 7) {
-		*PCI = (uint8_t) ('4' + i - 1);
-	} else {
-		*PCI = (uint8_t) ('A' + i - 1 - 6);
-	}
-	*HCIN = (uint8_t) i;
-	*UID = (uint8_t) (i + 3);
-
-	/* FIXME: need to update the GSI id in the ssdtx too */
-
-}
-
 unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) {
 	k8acpi_write_vars();
 	amd_model_fxx_generate_powernow(pm_base + 8, 6, 1);
diff --git a/src/mainboard/amd/mahogany/acpi_tables.c b/src/mainboard/amd/mahogany/acpi_tables.c
index 429a029761..c4319266cb 100644
--- a/src/mainboard/amd/mahogany/acpi_tables.c
+++ b/src/mainboard/amd/mahogany/acpi_tables.c
@@ -99,32 +99,6 @@ unsigned long acpi_fill_madt(unsigned long current)
 	return current;
 }
 
-
-
-#if CONFIG_ACPI_SSDTX_NUM >= 1
-static void update_ssdtx(void *ssdtx, int i)
-{
-	u8 *PCI;
-	u8 *HCIN;
-	u8 *UID;
-
-	PCI = ssdtx + 0x32;
-	HCIN = ssdtx + 0x39;
-	UID = ssdtx + 0x40;
-
-	if (i < 7) {
-		*PCI = (u8) ('4' + i - 1);
-	} else {
-		*PCI = (u8) ('A' + i - 1 - 6);
-	}
-	*HCIN = (u8) i;
-	*UID = (u8) (i + 3);
-
-	/* FIXME: need to update the GSI id in the ssdtx too */
-
-}
-#endif
-
 unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) {
 	k8acpi_write_vars();
 	amd_model_fxx_generate_powernow(pm_base + 8, 6, 1);
diff --git a/src/mainboard/amd/mahogany_fam10/acpi_tables.c b/src/mainboard/amd/mahogany_fam10/acpi_tables.c
index b9d58ce836..2e09a2395d 100644
--- a/src/mainboard/amd/mahogany_fam10/acpi_tables.c
+++ b/src/mainboard/amd/mahogany_fam10/acpi_tables.c
@@ -89,34 +89,6 @@ unsigned long acpi_fill_madt(unsigned long current)
 	return current;
 }
 
-
-extern void update_ssdt(void *ssdt);
-
-/* not tested yet. */
-#if CONFIG_ACPI_SSDTX_NUM >= 1
-static void update_ssdtx(void *ssdtx, int i)
-{
-	u8 *PCI;
-	u8 *HCIN;
-	u8 *UID;
-
-	PCI = ssdtx + 0x32;
-	HCIN = ssdtx + 0x39;
-	UID = ssdtx + 0x40;
-
-	if (i < 7) {
-		*PCI = (u8) ('4' + i - 1);
-	} else {
-		*PCI = (u8) ('A' + i - 1 - 6);
-	}
-	*HCIN = (u8) i;
-	*UID = (u8) (i + 3);
-
-	/* FIXME: need to update the GSI id in the ssdtx too */
-
-}
-#endif
-
 unsigned long write_acpi_tables(unsigned long start)
 {
 	unsigned long current;
diff --git a/src/mainboard/amd/pistachio/acpi_tables.c b/src/mainboard/amd/pistachio/acpi_tables.c
index 030a7fa55c..bf8d6542cb 100644
--- a/src/mainboard/amd/pistachio/acpi_tables.c
+++ b/src/mainboard/amd/pistachio/acpi_tables.c
@@ -92,30 +92,6 @@ unsigned long acpi_fill_madt(unsigned long current)
 	return current;
 }
 
-
-
-static void update_ssdtx(void *ssdtx, int i)
-{
-	uint8_t *PCI;
-	uint8_t *HCIN;
-	uint8_t *UID;
-
-	PCI = ssdtx + 0x32;
-	HCIN = ssdtx + 0x39;
-	UID = ssdtx + 0x40;
-
-	if (i < 7) {
-		*PCI = (uint8_t) ('4' + i - 1);
-	} else {
-		*PCI = (uint8_t) ('A' + i - 1 - 6);
-	}
-	*HCIN = (uint8_t) i;
-	*UID = (uint8_t) (i + 3);
-
-	/* FIXME: need to update the GSI id in the ssdtx too */
-
-}
-
 unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) {
 	k8acpi_write_vars();
 	amd_model_fxx_generate_powernow(pm_base + 8, 6, 1);
diff --git a/src/mainboard/amd/serengeti_cheetah/acpi_tables.c b/src/mainboard/amd/serengeti_cheetah/acpi_tables.c
index e225aee991..d2834584eb 100644
--- a/src/mainboard/amd/serengeti_cheetah/acpi_tables.c
+++ b/src/mainboard/amd/serengeti_cheetah/acpi_tables.c
@@ -150,31 +150,6 @@ unsigned long acpi_fill_madt(unsigned long current)
 	return current;
 }
 
-
-
-static void update_ssdtx(void *ssdtx, int i)
-{
-	u8 *PCI;
-	u8 *HCIN;
-	u8 *UID;
-
-	PCI = ssdtx + 0x32;
-	HCIN = ssdtx + 0x39;
-	UID = ssdtx + 0x40;
-
-	if(i<7) {
-		*PCI  = (u8) ('4' + i - 1);
-	}
-	else {
-		*PCI  = (u8) ('A' + i - 1 - 6);
-	}
-	*HCIN = (u8) i;
-	*UID  = (u8) (i+3);
-
-	/* FIXME: need to update the GSI id in the ssdtx too */
-
-}
-
 unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) {
 	k8acpi_write_vars();
 	return (unsigned long) (acpigen_get_current());
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c b/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c
index 6282ef60c9..868649171d 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c
@@ -160,32 +160,6 @@ unsigned long acpi_fill_madt(unsigned long current)
 	return current;
 }
 
-
-extern void update_ssdt(void *ssdt);
-
-static void update_ssdtx(void *ssdtx, int i)
-{
-	u8 *PCI;
-	u8 *HCIN;
-	u8 *UID;
-
-	PCI = ssdtx + 0x32;
-	HCIN = ssdtx + 0x39;
-	UID = ssdtx + 0x40;
-
-	if(i<7) {
-		*PCI  = (u8) ('4' + i - 1);
-	}
-	else {
-		*PCI  = (u8) ('A' + i - 1 - 6);
-	}
-	*HCIN = (u8) i;
-	*UID  = (u8) (i+3);
-
-	/* FIXME: need to update the GSI id in the ssdtx too */
-
-}
-
 unsigned long write_acpi_tables(unsigned long start)
 {
 	unsigned long current;
diff --git a/src/mainboard/asrock/939a785gmh/acpi_tables.c b/src/mainboard/asrock/939a785gmh/acpi_tables.c
index 429a029761..c4319266cb 100644
--- a/src/mainboard/asrock/939a785gmh/acpi_tables.c
+++ b/src/mainboard/asrock/939a785gmh/acpi_tables.c
@@ -99,32 +99,6 @@ unsigned long acpi_fill_madt(unsigned long current)
 	return current;
 }
 
-
-
-#if CONFIG_ACPI_SSDTX_NUM >= 1
-static void update_ssdtx(void *ssdtx, int i)
-{
-	u8 *PCI;
-	u8 *HCIN;
-	u8 *UID;
-
-	PCI = ssdtx + 0x32;
-	HCIN = ssdtx + 0x39;
-	UID = ssdtx + 0x40;
-
-	if (i < 7) {
-		*PCI = (u8) ('4' + i - 1);
-	} else {
-		*PCI = (u8) ('A' + i - 1 - 6);
-	}
-	*HCIN = (u8) i;
-	*UID = (u8) (i + 3);
-
-	/* FIXME: need to update the GSI id in the ssdtx too */
-
-}
-#endif
-
 unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) {
 	k8acpi_write_vars();
 	amd_model_fxx_generate_powernow(pm_base + 8, 6, 1);
diff --git a/src/mainboard/intel/eagleheights/acpi_tables.c b/src/mainboard/intel/eagleheights/acpi_tables.c
index b4b12b1cbb..83ed984670 100644
--- a/src/mainboard/intel/eagleheights/acpi_tables.c
+++ b/src/mainboard/intel/eagleheights/acpi_tables.c
@@ -50,7 +50,7 @@ unsigned long acpi_fill_mcfg(unsigned long current)
 	return current;
 }
 
-void acpi_create_intel_hpet(acpi_hpet_t * hpet)
+static void acpi_create_intel_hpet(acpi_hpet_t * hpet)
 {
 #define HPET_ADDR  0xfed00000ULL
 	acpi_header_t *header = &(hpet->header);
diff --git a/src/mainboard/iwill/dk8_htx/acpi_tables.c b/src/mainboard/iwill/dk8_htx/acpi_tables.c
index 8862444453..05664e31a5 100644
--- a/src/mainboard/iwill/dk8_htx/acpi_tables.c
+++ b/src/mainboard/iwill/dk8_htx/acpi_tables.c
@@ -157,31 +157,6 @@ unsigned long acpi_fill_madt(unsigned long current)
 	return current;
 }
 
-
-
-static void update_ssdtx(void *ssdtx, int i)
-{
-        uint8_t *PCI;
-        uint8_t *HCIN;
-        uint8_t *UID;
-
-        PCI = ssdtx + 0x32;
-        HCIN = ssdtx + 0x39;
-        UID = ssdtx + 0x40;
-
-        if(i<7) {
-                *PCI  = (uint8_t) ('4' + i - 1);
-        }
-        else {
-                *PCI  = (uint8_t) ('A' + i - 1 - 6);
-        }
-        *HCIN = (uint8_t) i;
-        *UID  = (uint8_t) (i+3);
-
-        /* FIXME: need to update the GSI id in the ssdtx too */
-
-}
-
 unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) {
 	k8acpi_write_vars();
 	return (unsigned long) (acpigen_get_current());
diff --git a/src/mainboard/kontron/kt690/acpi_tables.c b/src/mainboard/kontron/kt690/acpi_tables.c
index 5ecb613b7b..4866c18326 100644
--- a/src/mainboard/kontron/kt690/acpi_tables.c
+++ b/src/mainboard/kontron/kt690/acpi_tables.c
@@ -92,30 +92,6 @@ unsigned long acpi_fill_madt(unsigned long current)
 	return current;
 }
 
-
-
-static void update_ssdtx(void *ssdtx, int i)
-{
-	uint8_t *PCI;
-	uint8_t *HCIN;
-	uint8_t *UID;
-
-	PCI = ssdtx + 0x32;
-	HCIN = ssdtx + 0x39;
-	UID = ssdtx + 0x40;
-
-	if (i < 7) {
-		*PCI = (uint8_t) ('4' + i - 1);
-	} else {
-		*PCI = (uint8_t) ('A' + i - 1 - 6);
-	}
-	*HCIN = (uint8_t) i;
-	*UID = (uint8_t) (i + 3);
-
-	/* FIXME: need to update the GSI id in the ssdtx too */
-
-}
-
 unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) {
 	k8acpi_write_vars();
 	amd_model_fxx_generate_powernow(pm_base + 8, 6, 1);
diff --git a/src/mainboard/technexion/tim5690/acpi_tables.c b/src/mainboard/technexion/tim5690/acpi_tables.c
index 5ecb613b7b..4866c18326 100644
--- a/src/mainboard/technexion/tim5690/acpi_tables.c
+++ b/src/mainboard/technexion/tim5690/acpi_tables.c
@@ -92,30 +92,6 @@ unsigned long acpi_fill_madt(unsigned long current)
 	return current;
 }
 
-
-
-static void update_ssdtx(void *ssdtx, int i)
-{
-	uint8_t *PCI;
-	uint8_t *HCIN;
-	uint8_t *UID;
-
-	PCI = ssdtx + 0x32;
-	HCIN = ssdtx + 0x39;
-	UID = ssdtx + 0x40;
-
-	if (i < 7) {
-		*PCI = (uint8_t) ('4' + i - 1);
-	} else {
-		*PCI = (uint8_t) ('A' + i - 1 - 6);
-	}
-	*HCIN = (uint8_t) i;
-	*UID = (uint8_t) (i + 3);
-
-	/* FIXME: need to update the GSI id in the ssdtx too */
-
-}
-
 unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) {
 	k8acpi_write_vars();
 	amd_model_fxx_generate_powernow(pm_base + 8, 6, 1);
diff --git a/src/mainboard/technexion/tim8690/acpi_tables.c b/src/mainboard/technexion/tim8690/acpi_tables.c
index 5ecb613b7b..4866c18326 100644
--- a/src/mainboard/technexion/tim8690/acpi_tables.c
+++ b/src/mainboard/technexion/tim8690/acpi_tables.c
@@ -92,30 +92,6 @@ unsigned long acpi_fill_madt(unsigned long current)
 	return current;
 }
 
-
-
-static void update_ssdtx(void *ssdtx, int i)
-{
-	uint8_t *PCI;
-	uint8_t *HCIN;
-	uint8_t *UID;
-
-	PCI = ssdtx + 0x32;
-	HCIN = ssdtx + 0x39;
-	UID = ssdtx + 0x40;
-
-	if (i < 7) {
-		*PCI = (uint8_t) ('4' + i - 1);
-	} else {
-		*PCI = (uint8_t) ('A' + i - 1 - 6);
-	}
-	*HCIN = (uint8_t) i;
-	*UID = (uint8_t) (i + 3);
-
-	/* FIXME: need to update the GSI id in the ssdtx too */
-
-}
-
 unsigned long acpi_fill_ssdt_generator(unsigned long current, const char *oem_table_id) {
 	k8acpi_write_vars();
 	amd_model_fxx_generate_powernow(pm_base + 8, 6, 1);
diff --git a/src/mainboard/via/epia-m/acpi_tables.c b/src/mainboard/via/epia-m/acpi_tables.c
index 4d51eb6635..69c526c1fe 100644
--- a/src/mainboard/via/epia-m/acpi_tables.c
+++ b/src/mainboard/via/epia-m/acpi_tables.c
@@ -42,8 +42,6 @@ unsigned long write_acpi_tables(unsigned long start)
 	unsigned long current;
 	acpi_rsdp_t *rsdp;
 	acpi_rsdt_t *rsdt;
-	acpi_hpet_t *hpet;
-	acpi_madt_t *madt;
 	acpi_fadt_t *fadt;
 	acpi_facs_t *facs;
 	acpi_header_t *dsdt;
diff --git a/src/mainboard/via/epia-m700/wakeup.c b/src/mainboard/via/epia-m700/wakeup.c
index 16277b5faa..bb232b4dfe 100644
--- a/src/mainboard/via/epia-m700/wakeup.c
+++ b/src/mainboard/via/epia-m700/wakeup.c
@@ -133,12 +133,12 @@ void acpi_jump_wake(u32 vector)
 	//jason_tsc_count_end();
 
 	unsigned long long *real_mode_gdt_entries_at_eseg;
-	real_mode_gdt_entries_at_eseg = WAKE_THUNK16_GDT;		/* Copy from real_mode_gdt_entries and change limition to 1M and data base to 0; */
+	real_mode_gdt_entries_at_eseg = (void *)WAKE_THUNK16_GDT;	/* Copy from real_mode_gdt_entries and change limition to 1M and data base to 0; */
 	real_mode_gdt_entries_at_eseg[0] = 0x0000000000000000ULL;	/* Null descriptor */
 	real_mode_gdt_entries_at_eseg[1] = 0x000f9a000000ffffULL;	/* 16-bit real-mode 1M code at 0x00000000 */
 	real_mode_gdt_entries_at_eseg[2] = 0x000f93000000ffffULL;	/* 16-bit real-mode 1M data at 0x00000000 */
 
-	wake_thunk16_Xgt_desc = WAKE_THUNK16_XDTR;
+	wake_thunk16_Xgt_desc = (void *)WAKE_THUNK16_XDTR;
 	wake_thunk16_Xgt_desc[0].size = sizeof(real_mode_gdt_entries) - 1;
 	wake_thunk16_Xgt_desc[0].address = (long)real_mode_gdt_entries_at_eseg;
 	wake_thunk16_Xgt_desc[1].size = 0x3ff;
@@ -156,7 +156,7 @@ void acpi_jump_wake(u32 vector)
 
 	unsigned char *dest, *src;
 	src = (unsigned char *)dwEip;
-	dest = WAKE_RECOVER1M_CODE;
+	dest = (void *)WAKE_RECOVER1M_CODE;
 	u32 i;
 	for (i = 0; i < 0x200; i++)
 		dest[i] = src[i];
diff --git a/src/northbridge/amd/amdfam10/amdfam10_acpi.c b/src/northbridge/amd/amdfam10/amdfam10_acpi.c
index ba4c36bee4..7e57cce0ab 100644
--- a/src/northbridge/amd/amdfam10/amdfam10_acpi.c
+++ b/src/northbridge/amd/amdfam10/amdfam10_acpi.c
@@ -268,6 +268,28 @@ void update_ssdt(void *ssdt)
 
 }
 
+void update_ssdtx(void *ssdtx, int i)
+{
+	u8 *PCI;
+	u8 *HCIN;
+	u8 *UID;
+
+	PCI = ssdtx + 0x32;
+	HCIN = ssdtx + 0x39;
+	UID = ssdtx + 0x40;
+
+	if (i < 7) {
+		*PCI = (u8) ('4' + i - 1);
+	} else {
+		*PCI = (u8) ('A' + i - 1 - 6);
+	}
+	*HCIN = (u8) i;
+	*UID = (u8) (i + 3);
+
+	/* FIXME: need to update the GSI id in the ssdtx too */
+
+}
+
 static void update_sspr(void *sspr, u32 nodeid, u32 cpuindex)
 {
 	u8 *CPU;
@@ -291,7 +313,7 @@ static void update_sspr(void *sspr, u32 nodeid, u32 cpuindex)
 	CONTROL = sspr + 0x8d;
 	STATUS = sspr + 0x8f;
 
-	sprintf(CPU, "%02x", (char)cpuindex);
+	sprintf((char*)CPU, "%02x", (char)cpuindex);
 	*CPUIN = (u8) cpuindex;
 
 	for(i=0;i<sysconf.p_state_num;i++) {
diff --git a/src/northbridge/amd/amdk8/amdk8_acpi.c b/src/northbridge/amd/amdk8/amdk8_acpi.c
index 1257f86633..92a4520eac 100644
--- a/src/northbridge/amd/amdk8/amdk8_acpi.c
+++ b/src/northbridge/amd/amdk8/amdk8_acpi.c
@@ -291,3 +291,26 @@ int k8acpi_write_vars(void)
 	acpigen_patch_len(lens - 1);
 	return lens;
 }
+
+void update_ssdtx(void *ssdtx, int i)
+{
+	u8 *PCI;
+	u8 *HCIN;
+	u8 *UID;
+
+	PCI = ssdtx + 0x32;
+	HCIN = ssdtx + 0x39;
+	UID = ssdtx + 0x40;
+
+	if (i < 7) {
+		*PCI = (u8) ('4' + i - 1);
+	} else {
+		*PCI = (u8) ('A' + i - 1 - 6);
+	}
+	*HCIN = (u8) i;
+	*UID = (u8) (i + 3);
+
+	/* FIXME: need to update the GSI id in the ssdtx too */
+
+}
+
diff --git a/src/northbridge/via/vx800/examples/romstage.c b/src/northbridge/via/vx800/examples/romstage.c
index 9fac9a3110..8db60237b7 100644
--- a/src/northbridge/via/vx800/examples/romstage.c
+++ b/src/northbridge/via/vx800/examples/romstage.c
@@ -47,7 +47,7 @@
 #include "northbridge/via/vx800/raminit.c"
 
 
-int acpi_is_wakeup_early_via_vx800(void)
+static int acpi_is_wakeup_early_via_vx800(void)
 {
 	device_t dev;
 	u16 tmp, result;
diff --git a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
index 4dd3678097..aa75f50651 100644
--- a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
+++ b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
@@ -295,9 +295,10 @@ void enable_rom_decode(void)
 	pci_write_config8(dev, 0x41, 0x7f);
 }
 
+#ifdef CONFIG_NORTHBRIDGE_AMD_K8 /* CN700 doesn't have the support yet */
 #define ACPI_IS_WAKEUP_EARLY 1
 
-int acpi_is_wakeup_early(void) {
+static int acpi_is_wakeup_early(void) {
 	device_t dev;
 	u16 tmp;
 
@@ -325,6 +326,7 @@ int acpi_is_wakeup_early(void) {
 	print_debug_hex8(tmp);
 	return ((tmp & (7 << 10)) >> 10) == 1 ? 3 : 0 ;
 }
+#endif
 
 #if defined(__GNUC__)
 void vt8237_early_spi_init(void)