diff options
author | Keith Hui <buurin@gmail.com> | 2023-09-30 11:22:37 -0400 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-11-22 17:53:56 +0000 |
commit | e94d7d8264fa77c69e113865e668107143128ccf (patch) | |
tree | 4e2f55d2e92201d999f5ac23101f26ea61c4963e | |
parent | bbb6d5d4777fe75ee94f35a1c290c361086ed035 (diff) |
mb/asus/p8z77-m: Ensure RAM stays powered in ACPI S3 suspend
Enable 3VSBSW# in NCT6779D super I/O like other variants in the family,
needed to maintain power to memory during S3 suspend. Without it
resuming totally fails.
(Enabling it in devicetree is OK; it needs not be done in early
board init.)
TEST=Resuming from S3 works.
Change-Id: Ia8059b2a263ab5c459e54685f046eeb913776473
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78205
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Kevin Keijzer <kevin@quietlife.nl>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb index cdcaa57712..c9fd78433f 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb +++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb @@ -52,6 +52,7 @@ chip northbridge/intel/sandybridge drq 0xe1 = 0x80 # GP07 high end device pnp 2e.a on # ACPI + drq 0xe4 = 0x10 # Enable 3VSBSW#, needed for S3 suspend drq 0xe7 = 0x11 # HWM reset by LRESET#, 0.5s S3 delay for compatibility drq 0xf2 = 0x5d # Enable RSTOUT[0-2]# and PME end |