diff options
author | David Wu <david_wu@quanta.corp-partner.google.com> | 2022-06-23 09:45:11 +0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-24 13:28:19 +0000 |
commit | e910fba5aa0ee51bbecd5965cca85dea98920977 (patch) | |
tree | f24626a73e7dd9e08741d25af816b513c0bc572f | |
parent | 2e1bcd3985cb48564a7d5d797232b0826b4c444a (diff) |
mb/google/brya/var/osiris: Disable PCH USB2 phy power gating
The patch disables PCH USB2 Phy power gating to prevent possible display
flicker issue for osiris board. Please refer Intel doc#723158 for
more information.
BUG=None
TEST=Verify the build for osiris board
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: Ia30a7b915df14c91a2526dca3e374436da286b7a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65324
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
-rw-r--r-- | src/mainboard/google/brya/variants/osiris/overridetree.cb | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/osiris/overridetree.cb b/src/mainboard/google/brya/variants/osiris/overridetree.cb index 6200daae85..4e32c0dde6 100644 --- a/src/mainboard/google/brya/variants/osiris/overridetree.cb +++ b/src/mainboard/google/brya/variants/osiris/overridetree.cb @@ -11,6 +11,10 @@ end chip soc/intel/alderlake register "sagv" = "SaGv_Enabled" + # As per Intel Advisory doc#723158, the change is required to prevent possible + # display flickering issue. + register "usb2_phy_sus_pg_disable" = "1" + register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2_C1 register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable M.2 WWAN |