diff options
| author | Kevin Chiu <Kevin.Chiu@quantatw.com> | 2017-03-20 22:58:22 +0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-03-21 23:52:17 +0100 |
| commit | e8ec53aa49f5bcfc425680a760edcab07b465c0b (patch) | |
| tree | c7f452764eeb3df24c5226e42c4c1a3c81d8f4f8 | |
| parent | 8110223989b34675c949465663c7ebfd5eb10155 (diff) | |
google/pyro: Update DPTF settings
1. correct DPTF TCHG target device to TSR2
2. Refers Change-Id I267b6e07fa9def2c91ff9f6035f2d9437faf1965
(mb/google/reef: Remove CPU throttling effect of the charger sensor)
to remove CPU throttling effect of the charger sensor
since it's not relevant to throttle CPU based on the charger sensor.
BUG=b:35586881
BRANCH=reef
TEST=emerge-pyro coreboot
Change-Id: I4801e0e612e0ddf90764ffe080c679818d33212a
Signed-off-by: Kevin Chiu <Kevin.Chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/18920
Tested-by: build bot (Jenkins)
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl b/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl index cba677510b..8803551b0e 100644 --- a/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl @@ -56,15 +56,12 @@ Name (DTRT, Package () { Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 100, 500, 0, 0, 0, 0 }, #ifdef DPTF_ENABLE_CHARGER - /* Charger Effect on Temp Sensor 1 */ - Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 200, 600, 0, 0, 0, 0 }, + /* Charger Effect on Temp Sensor 2 */ + Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR2, 200, 600, 0, 0, 0, 0 }, #endif /* CPU Effect on Temp Sensor 1 */ Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 100, 80, 0, 0, 0, 0 }, - - /* CPU Effect on Temp Sensor 2 */ - Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 100, 1200, 0, 0, 0, 0 }, }) Name (MPPC, Package () |