diff options
author | Julius Werner <jwerner@chromium.org> | 2019-08-12 16:45:21 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-08-22 10:36:22 +0000 |
commit | db7f6fb75282a305c2b0f5540d2f7be939f20dde (patch) | |
tree | 2c4fc9e51c6c38c9d7a10a91083c961fd914471e | |
parent | 54ff1a0ad3bb3c1c4bc5283aaf2f03b17c3b25f1 (diff) |
Add buffer_to/from_fifo32(_prefix) helpers
Many peripheral drivers across different SoCs regularly face the same
task of piping a transfer buffer into (or reading it out of) a 32-bit
FIFO register. Sometimes it's just one register, sometimes a whole array
of registers. Sometimes you actually transfer 4 bytes per register
read/write, sometimes only 2 (or even 1). Sometimes writes need to be
prefixed with one or two command bytes which makes the actual payload
buffer "misaligned" in relation to the FIFO and requires a bunch of
tricky bit packing logic to get right. Most of the times transfer
lengths are not guaranteed to be divisible by 4, which also requires a
bunch of logic to treat the potential unaligned end of the transfer
correctly.
We have a dozen different implementations of this same pattern across
coreboot. This patch introduces a new family of helper functions that
aims to solve all these use cases once and for all (*fingers crossed*).
Change-Id: Ia71f66c1cee530afa4c77c46a838b4de646ffcfb
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34850
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r-- | payloads/libpayload/include/libpayload.h | 19 | ||||
-rw-r--r-- | payloads/libpayload/libc/lib.c | 52 | ||||
-rw-r--r-- | src/device/Makefile.inc | 5 | ||||
-rw-r--r-- | src/device/mmio.c | 55 | ||||
-rw-r--r-- | src/include/device/mmio.h | 37 |
5 files changed, 167 insertions, 1 deletions
diff --git a/payloads/libpayload/include/libpayload.h b/payloads/libpayload/include/libpayload.h index 57a3afc6b1..80bfaae6bf 100644 --- a/payloads/libpayload/include/libpayload.h +++ b/payloads/libpayload/include/libpayload.h @@ -446,6 +446,25 @@ static inline int __ffs(u32 x) { return log2(x & (u32)(-(s32)x)); } /** + * @defgroup mmio MMIO helper functions + * @{ + */ +#if !CONFIG(LP_ARCH_MIPS) +void buffer_from_fifo32(void *buffer, size_t size, void *fifo, + int fifo_stride, int fifo_width); +void buffer_to_fifo32_prefix(void *buffer, u32 prefix, int prefsz, size_t size, + void *fifo, int fifo_stride, int fifo_width); +static inline void buffer_to_fifo32(void *buffer, size_t size, void *fifo, + int fifo_stride, int fifo_width) +{ + buffer_to_fifo32_prefix(buffer, size, 0, 0, fifo, + fifo_stride, fifo_width); +} +#endif +/** @} */ + + +/** * @defgroup hash Hashing functions * @{ */ diff --git a/payloads/libpayload/libc/lib.c b/payloads/libpayload/libc/lib.c index bead1f801b..081d7dd0e2 100644 --- a/payloads/libpayload/libc/lib.c +++ b/payloads/libpayload/libc/lib.c @@ -27,6 +27,7 @@ * SUCH DAMAGE. */ +#include <assert.h> #include <libpayload.h> /* @@ -125,3 +126,54 @@ char *getenv(const char *name) { return NULL; } + +#if !CONFIG(LP_ARCH_MIPS) +/* + * Reads a transfer buffer from 32-bit FIFO registers. fifo_stride is the + * distance in bytes between registers (e.g. pass 4 for a normal array of 32-bit + * registers or 0 to read everything from the same register). fifo_width is + * the amount of bytes read per register (can be 1 through 4). + */ +void buffer_from_fifo32(void *buffer, size_t size, void *fifo, + int fifo_stride, int fifo_width) +{ + u8 *p = buffer; + int i, j; + + assert(fifo_width > 0 && fifo_width <= sizeof(u32) && + fifo_stride % sizeof(u32) == 0); + + for (i = 0; i < size; i += fifo_width, fifo += fifo_stride) { + u32 val = read32(fifo); + for (j = 0; j < MIN(size - i, fifo_width); j++) + *p++ = (u8)(val >> (j * 8)); + } +} + +/* + * Version of buffer_to_fifo32() that can prepend a prefix of up to fifo_width + * size to the transfer. This is often useful for protocols where a command word + * precedes the actual payload data. The prefix must be packed in the low-order + * bytes of the 'prefix' u32 parameter and any high-order bytes exceeding prefsz + * must be 0. Note that 'size' counts total bytes written, including 'prefsz'. + */ +void buffer_to_fifo32_prefix(void *buffer, u32 prefix, int prefsz, size_t size, + void *fifo, int fifo_stride, int fifo_width) +{ + u8 *p = buffer; + int i, j = prefsz; + + assert(fifo_width > 0 && fifo_width <= sizeof(u32) && + fifo_stride % sizeof(u32) == 0 && prefsz <= fifo_width); + + uint32_t val = prefix; + for (i = 0; i < size; i += fifo_width, fifo += fifo_stride) { + for (; j < MIN(size - i, fifo_width); j++) + val |= *p++ << (j * 8); + write32(fifo, val); + val = 0; + j = 0; + } + +} +#endif diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc index baa45bec3e..966ca0d198 100644 --- a/src/device/Makefile.inc +++ b/src/device/Makefile.inc @@ -53,3 +53,8 @@ verstage-y += i2c.c romstage-y += i2c.c ramstage-y += i2c.c ramstage-y += i2c_bus.c + +bootblock-y += mmio.c +verstage-y += mmio.c +romstage-y += mmio.c +ramstage-y += mmio.c diff --git a/src/device/mmio.c b/src/device/mmio.c new file mode 100644 index 0000000000..61a1130604 --- /dev/null +++ b/src/device/mmio.c @@ -0,0 +1,55 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <assert.h> +#include <device/mmio.h> + +/* Helper functions for various MMIO access patterns. */ + +void buffer_from_fifo32(void *buffer, size_t size, void *fifo, + int fifo_stride, int fifo_width) +{ + u8 *p = buffer; + int i, j; + + assert(fifo_width > 0 && fifo_width <= sizeof(u32) && + fifo_stride % sizeof(u32) == 0); + + for (i = 0; i < size; i += fifo_width, fifo += fifo_stride) { + u32 val = read32(fifo); + for (j = 0; j < MIN(size - i, fifo_width); j++) + *p++ = (u8)(val >> (j * 8)); + } +} + +void buffer_to_fifo32_prefix(void *buffer, u32 prefix, int prefsz, size_t size, + void *fifo, int fifo_stride, int fifo_width) +{ + u8 *p = buffer; + int i, j = prefsz; + + assert(fifo_width > 0 && fifo_width <= sizeof(u32) && + fifo_stride % sizeof(u32) == 0 && prefsz <= fifo_width); + + uint32_t val = prefix; + for (i = 0; i < size; i += fifo_width, fifo += fifo_stride) { + for (; j < MIN(size - i, fifo_width); j++) + val |= *p++ << (j * 8); + write32(fifo, val); + val = 0; + j = 0; + } + +} diff --git a/src/include/device/mmio.h b/src/include/device/mmio.h index 34be1e8172..e40b40f49f 100644 --- a/src/include/device/mmio.h +++ b/src/include/device/mmio.h @@ -17,5 +17,40 @@ #include <arch/mmio.h> #include <endian.h> +#include <types.h> -#endif +#ifndef __ROMCC__ +/* + * Reads a transfer buffer from 32-bit FIFO registers. fifo_stride is the + * distance in bytes between registers (e.g. pass 4 for a normal array of 32-bit + * registers or 0 to read everything from the same register). fifo_width is + * the amount of bytes read per register (can be 1 through 4). + */ +void buffer_from_fifo32(void *buffer, size_t size, void *fifo, + int fifo_stride, int fifo_width); + +/* + * Version of buffer_to_fifo32() that can prepend a prefix of up to fifo_width + * size to the transfer. This is often useful for protocols where a command word + * precedes the actual payload data. The prefix must be packed in the low-order + * bytes of the 'prefix' u32 parameter and any high-order bytes exceeding prefsz + * must be 0. Note that 'size' counts total bytes written, including 'prefsz'. + */ +void buffer_to_fifo32_prefix(void *buffer, u32 prefix, int prefsz, size_t size, + void *fifo, int fifo_stride, int fifo_width); + +/* + * Writes a transfer buffer into 32-bit FIFO registers. fifo_stride is the + * distance in bytes between registers (e.g. pass 4 for a normal array of 32-bit + * registers or 0 to write everything into the same register). fifo_width is + * the amount of bytes written per register (can be 1 through 4). + */ +static inline void buffer_to_fifo32(void *buffer, size_t size, void *fifo, + int fifo_stride, int fifo_width) +{ + buffer_to_fifo32_prefix(buffer, size, 0, 0, fifo, + fifo_stride, fifo_width); +} +#endif /* !__ROMCC__ */ + +#endif /* __DEVICE_MMIO_H__ */ |