diff options
| author | Bill XIE <persmule@hardenedlinux.org> | 2019-10-26 11:02:30 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-28 11:55:59 +0000 |
| commit | d8b6e671f143f12cb4bc1148a8c9849ccdb65357 (patch) | |
| tree | adc7ad81c3694f7c9c10520aa0c11acba24ca872 | |
| parent | 7c24de9cb772cc8c0867aef544bf8ddc89745ea2 (diff) | |
mb/lenovo/x200: Correct device tree override logic
If a device node should be enabled on some variants, but disabled on
others, it had better be declared as disabled (rather than absent) in
base device tree (rather than override tree for the variant disabling
it), and enabled in override tree for the variant needing it, so that
it does not need to be declared once more when adding another variant
with such node disabled.
Change-Id: I4b28360905ae38149ace9ac5d21cd6d5045b7584
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36347
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
| -rw-r--r-- | src/mainboard/lenovo/x200/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/lenovo/x200/variants/x301/overridetree.cb | 1 |
2 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/x200/devicetree.cb b/src/mainboard/lenovo/x200/devicetree.cb index fdd69ec91e..3c4e094f35 100644 --- a/src/mainboard/lenovo/x200/devicetree.cb +++ b/src/mainboard/lenovo/x200/devicetree.cb @@ -108,7 +108,7 @@ chip northbridge/intel/gm45 device pci 1c.2 on subsystemid 0x17aa 0x20f3 # UWB end # PCIe Port #3 - # PCIe Port #4 is configured in override tree. + device pci 1c.3 off end # PCIe Port #4 device pci 1c.4 off end # PCIe Port #5 device pci 1c.5 off end # PCIe Port #6 device pci 1d.0 on # UHCI diff --git a/src/mainboard/lenovo/x200/variants/x301/overridetree.cb b/src/mainboard/lenovo/x200/variants/x301/overridetree.cb index fafe5e9337..03cb4dfe9a 100644 --- a/src/mainboard/lenovo/x200/variants/x301/overridetree.cb +++ b/src/mainboard/lenovo/x200/variants/x301/overridetree.cb @@ -8,7 +8,6 @@ chip northbridge/intel/gm45 register "pcie_power_limits" = "{ { 10, 0 }, { 10, 0 }, { 10, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 } }" # x301 has no Express Card slot. register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" - device pci 1c.3 off end # PCIe Port #4 end end end |