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authorSubrata Banik <subrata.banik@intel.com>2020-02-03 10:51:01 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-02-04 16:14:18 +0000
commitd8663e0fc6629835eba44cc78e63e285aced897f (patch)
tree0a1c3568e40efeda10c22740c92b2f505e4495c4
parent6ec322ec7c27005d64a907076188b09a7cf09aa7 (diff)
soc/intel: Remove duplicate CPUID entry
This patch removes duplicate CPUID entry between KBL and CFL. CFL-D0 has KBL CPU + CNP PCH hence no need to redefine same KBL CPUID (0x806EA) for CFL-D0. TEST=CFL-D0 report platform serial msg shows "Cofeelake D0" with CPUID 0x806EA. Change-Id: I078dd7860891896b512967dc8dec5dd94d069193 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38672 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: V Sowmya <v.sowmya@intel.com>
-rw-r--r--src/soc/intel/cannonlake/bootblock/report_platform.c2
-rw-r--r--src/soc/intel/common/block/cpu/mp_init.c1
-rw-r--r--src/soc/intel/common/block/include/intelblocks/mp_init.h1
3 files changed, 1 insertions, 3 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c
index 67dd452e8e..b89c3b4147 100644
--- a/src/soc/intel/cannonlake/bootblock/report_platform.c
+++ b/src/soc/intel/cannonlake/bootblock/report_platform.c
@@ -37,7 +37,7 @@ static struct {
{ CPUID_CANNONLAKE_B0, "Cannonlake B0" },
{ CPUID_CANNONLAKE_C0, "Cannonlake C0" },
{ CPUID_CANNONLAKE_D0, "Cannonlake D0" },
- { CPUID_COFFEELAKE_D0, "Coffeelake D0" },
+ { CPUID_KABYLAKE_Y0, "Coffeelake D0" },
{ CPUID_WHISKEYLAKE_V0, "Whiskeylake V0" },
{ CPUID_WHISKEYLAKE_W0, "Whiskeylake W0" },
{ CPUID_COFFEELAKE_U0, "Coffeelake U0 (6+2)" },
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index f3c6c7d573..66a358f09a 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -75,7 +75,6 @@ static const struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, CPUID_WHISKEYLAKE_W0 },
{ X86_VENDOR_INTEL, CPUID_COFFEELAKE_U0 },
{ X86_VENDOR_INTEL, CPUID_COFFEELAKE_B0 },
- { X86_VENDOR_INTEL, CPUID_COFFEELAKE_D0 },
{ X86_VENDOR_INTEL, CPUID_COFFEELAKE_P0 },
{ X86_VENDOR_INTEL, CPUID_COFFEELAKE_R0 },
{ X86_VENDOR_INTEL, CPUID_ICELAKE_A0 },
diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h
index e0b0d8c174..c0c58afc8d 100644
--- a/src/soc/intel/common/block/include/intelblocks/mp_init.h
+++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h
@@ -40,7 +40,6 @@
#define CPUID_GLK_R0 0x706a8
#define CPUID_WHISKEYLAKE_V0 0x806ec
#define CPUID_WHISKEYLAKE_W0 0x806eb
-#define CPUID_COFFEELAKE_D0 0x806ea
#define CPUID_COFFEELAKE_U0 0x906ea
#define CPUID_COFFEELAKE_B0 0x906eb
#define CPUID_COFFEELAKE_P0 0x906ec