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authorMarc Jones <marcjones@sysproconsulting.com>2020-09-23 16:23:41 -0600
committerMarc Jones <marc@marcjonesconsulting.com>2020-10-26 00:15:36 +0000
commitd3d50e027f8c5b4b2a19450fa89ed0e07d69ce8e (patch)
tree334a75d94af47073f96c68178e70929d25ae0a78
parente866a2fde43b0c75aa8ce29291c8b44dffe8e65c (diff)
soc/intel/xeon_sp/acpi: Add pch.asl
Add ASL for the PCH. Initially, this only contains soc/intel/common/block/acpi/acpi/lpc.asl. Additional PCH ASL may be added in the future. Change-Id: I70cb790355430f63f25e0dbc9fccc22462fe3572 Signed-off-by: Marc Jones <marcjones@sysproconsulting.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45836 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/xeon_sp/acpi/pch.asl6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/acpi/pch.asl b/src/soc/intel/xeon_sp/acpi/pch.asl
new file mode 100644
index 0000000000..98a5fdd50d
--- /dev/null
+++ b/src/soc/intel/xeon_sp/acpi/pch.asl
@@ -0,0 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/* This file should be included in the proper platform ACPI \_SB PCI scope */
+
+/* LPC 0:1f.0 */
+#include <soc/intel/common/block/acpi/acpi/lpc.asl>