diff options
| author | Myles Watson <mylesgw@gmail.com> | 2009-11-06 23:42:26 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2009-11-06 23:42:26 +0000 |
| commit | d27c08c2898d1d74765a7799628d1c18369fd671 (patch) | |
| tree | 7ac357d2b44d833c6efe70d1e691c6611c521e8d | |
| parent | 547d48ab01049a634dccb16d1847524d5ba93e33 (diff) | |
Remove drivers/pci/onboard. The only purpose was for option ROMs, which are
now handled more generically using CBFS.
Simplify the option ROM code in device/pci_rom.c, since there are only two ways
to get a ROM address now (CBFS and the device) and add an exception for qemu.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
107 files changed, 169 insertions, 721 deletions
diff --git a/src/devices/pci_device.c b/src/devices/pci_device.c index 2360028756..3373c8481c 100644 --- a/src/devices/pci_device.c +++ b/src/devices/pci_device.c @@ -285,11 +285,6 @@ static void pci_get_rom_resource(struct device *dev, unsigned long index) unsigned long value; resource_t moving; - if ((dev->on_mainboard) && (dev->rom_address == 0)) { - /* Skip it if rom_address is not set in the MB Config.lb. */ - return; - } - /* Initialize the resources to nothing. */ resource = new_resource(dev, index); @@ -326,18 +321,6 @@ static void pci_get_rom_resource(struct device *dev, unsigned long index) } resource->flags = 0; } - - /* For on board device with embedded ROM image, the ROM image is at - * fixed address specified in the Config.lb, the dev->rom_address is - * inited by driver_pci_onboard_ops::enable_dev() */ - if ((dev->on_mainboard) && (dev->rom_address != 0)) { - resource->base = dev->rom_address; - /* The resource allocator needs the size to be non-zero. */ - resource->size = 0x100; - resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY | - IORESOURCE_ASSIGNED | IORESOURCE_FIXED; - } - compact_resources(dev); } diff --git a/src/devices/pci_rom.c b/src/devices/pci_rom.c index cafeed4897..9b2d281129 100644 --- a/src/devices/pci_rom.c +++ b/src/devices/pci_rom.c @@ -31,42 +31,37 @@ struct rom_header * pci_rom_probe(struct device *dev) { - unsigned long rom_address = 0; struct rom_header *rom_header; struct pci_data *rom_data; - void *v; - /* if it's in FLASH, then it's as if dev->on_mainboard was true */ - v = cbfs_load_optionrom(dev->vendor, dev->device, NULL); - printk_debug("In cbfs, rom address for %s = %p\n", - dev_path(dev), v); - if (v) { - dev->rom_address = (u32)v; - dev->on_mainboard = 1; - } + /* If it's in FLASH, then don't check device for ROM. */ + rom_header = cbfs_load_optionrom(dev->vendor, dev->device, NULL); - if (dev->on_mainboard) { - // in case some device PCI_ROM_ADDRESS can not be set or readonly - rom_address = dev->rom_address; - printk_debug("On mainboard, rom address for %s = %lx\n", - dev_path(dev), rom_address); + if (rom_header) { + printk_debug("In cbfs, rom address for %s = %p\n", + dev_path(dev), rom_header); } else { + unsigned long rom_address; + rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS); - printk_debug("On card, rom address for %s = %lx\n", - dev_path(dev), rom_address); - } - if (rom_address == 0x00000000 || rom_address == 0xffffffff) { - return NULL; - } + if (rom_address == 0x00000000 || rom_address == 0xffffffff) { + #if CONFIG_BOARD_EMULATION_QEMU_X86 + rom_address = 0xc0000; + #else + return NULL; + #endif + } else { + /* enable expansion ROM address decoding */ + pci_write_config32(dev, PCI_ROM_ADDRESS, + rom_address|PCI_ROM_ADDRESS_ENABLE); + } - if(!dev->on_mainboard) { - /* enable expansion ROM address decoding */ - pci_write_config32(dev, PCI_ROM_ADDRESS, - rom_address|PCI_ROM_ADDRESS_ENABLE); + printk_debug("On card, rom address for %s = %lx\n", + dev_path(dev), rom_address); + rom_header = (struct rom_header *)rom_address; } - rom_header = (struct rom_header *)rom_address; printk_spew("PCI Expansion ROM, signature 0x%04x, INIT size 0x%04x, data ptr 0x%04x\n", le32_to_cpu(rom_header->signature), rom_header->size * 512, le32_to_cpu(rom_header->data)); @@ -76,11 +71,12 @@ struct rom_header * pci_rom_probe(struct device *dev) return NULL; } - rom_data = (struct pci_data *) ((void *)rom_header + le32_to_cpu(rom_header->data)); + rom_data = (((void *)rom_header) + le32_to_cpu(rom_header->data)); + printk_spew("PCI ROM Image, Vendor %04x, Device %04x,\n", rom_data->vendor, rom_data->device); if (dev->vendor != rom_data->vendor || dev->device != rom_data->device) { - printk_err("Device or Vendor ID mismatch Vendor %04x, Device %04x\n", + printk_err("ID mismatch: Vendor ID %04x, Device ID %04x\n", rom_data->vendor, rom_data->device); return NULL; } @@ -90,7 +86,8 @@ struct rom_header * pci_rom_probe(struct device *dev) rom_data->type); if (dev->class != ((rom_data->class_hi << 8) | rom_data->class_lo)) { printk_debug("Class Code mismatch ROM %08x, dev %08x\n", - (rom_data->class_hi << 8) | rom_data->class_lo, dev->class); + (rom_data->class_hi << 8) | rom_data->class_lo, + dev->class); //return NULL; } diff --git a/src/drivers/Makefile.inc b/src/drivers/Makefile.inc index ca2ce66f4a..95a2afd63b 100644 --- a/src/drivers/Makefile.inc +++ b/src/drivers/Makefile.inc @@ -1,3 +1,2 @@ -subdirs-y += pci subdirs-y += generic/debug subdirs-y += ati/ragexl diff --git a/src/drivers/pci/Makefile.inc b/src/drivers/pci/Makefile.inc deleted file mode 100644 index 09ac260c9c..0000000000 --- a/src/drivers/pci/Makefile.inc +++ /dev/null @@ -1 +0,0 @@ -subdirs-y += onboard diff --git a/src/drivers/pci/onboard/Config.lb b/src/drivers/pci/onboard/Config.lb deleted file mode 100644 index d249df4658..0000000000 --- a/src/drivers/pci/onboard/Config.lb +++ /dev/null @@ -1,4 +0,0 @@ -config chip.h - -object onboard.o - diff --git a/src/drivers/pci/onboard/Makefile.inc b/src/drivers/pci/onboard/Makefile.inc deleted file mode 100644 index 5a16314cce..0000000000 --- a/src/drivers/pci/onboard/Makefile.inc +++ /dev/null @@ -1 +0,0 @@ -obj-y += onboard.o diff --git a/src/drivers/pci/onboard/chip.h b/src/drivers/pci/onboard/chip.h deleted file mode 100644 index f06f53ec7a..0000000000 --- a/src/drivers/pci/onboard/chip.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef PCI_ONBOARD_H -#define PCI_ONBOARD_H - -struct drivers_pci_onboard_config -{ - unsigned long rom_address; -}; -struct chip_operations; -extern struct chip_operations drivers_pci_onboard_ops; - -#endif diff --git a/src/drivers/pci/onboard/onboard.c b/src/drivers/pci/onboard/onboard.c deleted file mode 100644 index 58e6816f23..0000000000 --- a/src/drivers/pci/onboard/onboard.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Copyright 2004 Tyan Computer - * by yhlu@tyan.com - */ - -#include <console/console.h> - -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pci_ops.h> -#include "chip.h" - -/* - * How to use the onboard device driver for option rom execution: - * - * 1. You need to add the driver to your mainboard Config.lb: - * - * chip drivers/pci/onboard - * device pci x.0 on end - * register "rom_address" = "0xfff80000" - * end - * 2. Reduce the size of your normal (or fallback) image, by adding the - * following lines to your target Config.lb, after romimage "normal" - * # 48K for SCSI FW or ATI ROM - * option CONFIG_ROM_SIZE = 512*1024-48*1024 - * 3. Create your vgabios.bin, for example using awardeco and put it in the - * directory of your target Config.lb. You can also read an option rom from - * a running system, but this is unreliable, as some option roms are changed - * during execution: - * # dd if=/dev/mem of=atix.rom skip=1536 count=96 - * 4. After you built coreboot.rom, attach the option rom to your coreboot - * image: - * # cat ../atix.rom ./normal/coreboot.rom ./fallback/coreboot.rom > coreboot.rom - * - * Alternatively you can use the following script "nsxv" to build your image - * Usage: - * # ./nsxv s2850 - * - * #!/bin/bash - * MBVENDOR=tyan - * MBMODEL=$1 - * LBROOT=/home/yhlu/xx/xx - * - * echo $1 - * date - * - * cd "$LBROOT/freebios2/targets" - * rm -rf "$MBVENDOR/$MBMODEL/$MBMODEL" - * ./buildtarget "$MBVENDOR/$MBMODEL" &> "$LBROOT/x_b.txt" - * cd "$MBVENDOR/$MBMODEL/$MBMODEL" - * #make clean - * eval make &> "$LBROOT/x_m.txt" - * if [ $? -eq 0 ]; then - * echo "ok." - * else - * echo "FAILED! Log excerpt:" - * tail -n 15 "$LBROOT/x_m.txt" - * exit - * fi - * cat ../atix.rom ./normal/coreboot.rom ./fallback/coreboot.rom > "$LBROOT/rom/"$MBMODEL"_coreboot.rom" - * cp -f "$LBROOT/rom/"$MBMODEL"_coreboot.rom" /home/yhlu/ - * - * date - * - */ - -static void onboard_enable(device_t dev) -{ - struct drivers_pci_onboard_config *conf; - conf = dev->chip_info; - dev->rom_address = conf->rom_address; -} - -struct chip_operations drivers_pci_onboard_ops = { - CHIP_NAME("Onboard PCI") - .enable_dev = onboard_enable, -}; diff --git a/src/include/device/device.h b/src/include/device/device.h index 25a549cc72..d0cc370980 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -70,7 +70,6 @@ struct device { unsigned int enabled : 1; /* set if we should enable the device */ unsigned int initialized : 1; /* set if we have initialized the device */ unsigned int on_mainboard : 1; - unsigned long rom_address; u8 command; diff --git a/src/mainboard/amd/dbm690t/Config.lb b/src/mainboard/amd/dbm690t/Config.lb index 8fffd80411..fde48a1cc2 100644 --- a/src/mainboard/amd/dbm690t/Config.lb +++ b/src/mainboard/amd/dbm690t/Config.lb @@ -155,9 +155,7 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/rs690 device pci 0.0 on end # HT 0x7910 device pci 1.0 on # Internal Graphics P2P bridge 0x7912 - chip drivers/pci/onboard - device pci 5.0 on end # Internal Graphics 0x791F - end + device pci 5.0 on end # Internal Graphics 0x791F end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 device pci 3.0 off end # PCIE P2P bridge 0x791b diff --git a/src/mainboard/amd/dbm690t/devicetree.cb b/src/mainboard/amd/dbm690t/devicetree.cb index 10de5c16c8..a12e82db13 100644 --- a/src/mainboard/amd/dbm690t/devicetree.cb +++ b/src/mainboard/amd/dbm690t/devicetree.cb @@ -20,9 +20,7 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/rs690 device pci 0.0 on end # HT 0x7910 device pci 1.0 on # Internal Graphics P2P bridge 0x7912 - chip drivers/pci/onboard - device pci 5.0 on end # Internal Graphics 0x791F - end + device pci 5.0 on end # Internal Graphics 0x791F end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 device pci 3.0 off end # PCIE P2P bridge 0x791b diff --git a/src/mainboard/amd/pistachio/Config.lb b/src/mainboard/amd/pistachio/Config.lb index 93925fa9af..1f59668328 100644 --- a/src/mainboard/amd/pistachio/Config.lb +++ b/src/mainboard/amd/pistachio/Config.lb @@ -156,9 +156,7 @@ chip northbridge/amd/amdk8/root_complex device pci 0.0 on end # HT 0x7910 # device pci 0.1 off end # CLK device pci 1.0 on # Internal Graphics P2P bridge 0x7912 - chip drivers/pci/onboard - device pci 5.0 on end # Internal Graphics 0x791F - end + device pci 5.0 on end # Internal Graphics 0x791F end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 device pci 3.0 off end # PCIE P2P bridge 0x791b diff --git a/src/mainboard/amd/pistachio/devicetree.cb b/src/mainboard/amd/pistachio/devicetree.cb index ab915764b3..139a17e836 100644 --- a/src/mainboard/amd/pistachio/devicetree.cb +++ b/src/mainboard/amd/pistachio/devicetree.cb @@ -21,9 +21,7 @@ chip northbridge/amd/amdk8/root_complex device pci 0.0 on end # HT 0x7910 # device pci 0.1 off end # CLK device pci 1.0 on # Internal Graphics P2P bridge 0x7912 - chip drivers/pci/onboard - device pci 5.0 on end # Internal Graphics 0x791F - end + device pci 5.0 on end # Internal Graphics 0x791F end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 device pci 3.0 off end # PCIE P2P bridge 0x791b diff --git a/src/mainboard/arima/hdama/Config.lb b/src/mainboard/arima/hdama/Config.lb index 7df39865fe..13e351f7d7 100644 --- a/src/mainboard/arima/hdama/Config.lb +++ b/src/mainboard/arima/hdama/Config.lb @@ -177,9 +177,7 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end # USB1 device pci 0.2 off end # USB 2.0 device pci 1.0 off end # LAN - chip drivers/pci/onboard - device pci 6.0 on end # ATI Rage XL - end + device pci 6.0 on end # ATI Rage XL ## PCI Slot 5 (correct?) #chip drivers/generic/generic # device pci 5.0 on diff --git a/src/mainboard/arima/hdama/devicetree.cb b/src/mainboard/arima/hdama/devicetree.cb index ac09e730ae..a812814782 100644 --- a/src/mainboard/arima/hdama/devicetree.cb +++ b/src/mainboard/arima/hdama/devicetree.cb @@ -73,9 +73,7 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end # USB1 device pci 0.2 off end # USB 2.0 device pci 1.0 off end # LAN - chip drivers/pci/onboard - device pci 6.0 on end # ATI Rage XL - end + device pci 6.0 on end # ATI Rage XL ## PCI Slot 5 (correct?) #chip drivers/generic/generic # device pci 5.0 on diff --git a/src/mainboard/artecgroup/dbe61/realmode/chip.h b/src/mainboard/artecgroup/dbe61/realmode/chip.h index ba2725a2b4..04d1452a63 100644 --- a/src/mainboard/artecgroup/dbe61/realmode/chip.h +++ b/src/mainboard/artecgroup/dbe61/realmode/chip.h @@ -1,10 +1,6 @@ #ifndef PCI_REALMODE_H #define PCI_REALMODE_H -struct drivers_pci_realmode_config -{ - unsigned long rom_address; -}; //struct chip_operations; extern struct chip_operations drivers_pci_realmode_ops; diff --git a/src/mainboard/artecgroup/dbe61/realmode/vgabios.c b/src/mainboard/artecgroup/dbe61/realmode/vgabios.c index 944e7c03e0..1a9dced09e 100644 --- a/src/mainboard/artecgroup/dbe61/realmode/vgabios.c +++ b/src/mainboard/artecgroup/dbe61/realmode/vgabios.c @@ -74,36 +74,6 @@ emulator to successfully run this bios. */ - - - -/* - Modified to be an universal driver for loading VGA ROMs. - Aug 2006, anti.sullin@artecdesign.ee, Artec Design - - USAGE: - define in your motherboard Config.lb file in device hierarchy - around the VGA pci device realmode chip and define its rom address. - Rom address is read from Config.lb, this rom is then copied to 0xC000 and then excecuted - - chip drivers/pci/realmode - device pci 1.1 on end # VGA - register "rom_address" = "0xfffc0000" # at the beginning of 256k - end - - then, chip enable is called at this list first traversal, and this sets - up device's init callback. Device init is called during last list traversal and - so, other hw should be already initialized to run vga bios successfully. -*/ - - - - - - - - - /* Declare a temporary global descriptor table - necessary because the Core part of the bios no longer sets up any 16 bit segments */ __asm__ ( @@ -918,8 +888,6 @@ static void vga_init(device_t dev) // code to make vga init go through the emulator - as of yet this does not workfor the epia-m dev->on_mainboard=1; - dev->rom_address = (void *)cfg->rom_address; - pci_dev_init(dev); // code to make vga init run in real mode - does work but against the current coreboot philosophy diff --git a/src/mainboard/asi/mb_5blmp/Config.lb b/src/mainboard/asi/mb_5blmp/Config.lb index 65e2fd4c0f..93ac8e6fb6 100644 --- a/src/mainboard/asi/mb_5blmp/Config.lb +++ b/src/mainboard/asi/mb_5blmp/Config.lb @@ -135,11 +135,6 @@ chip northbridge/amd/gx1 # Northbridge device pci 12.2 on end # IDE device pci 12.3 on end # Audio device pci 12.4 on end # VGA (onboard) - # device pci 12.4 on # VGA (onboard) - # chip drivers/pci/onboard - # device pci 12.4 on end - # end - # end device pci 13.0 on end # USB register "ide0_enable" = "1" register "ide1_enable" = "1" diff --git a/src/mainboard/asi/mb_5blmp/devicetree.cb b/src/mainboard/asi/mb_5blmp/devicetree.cb index 0b1505a136..ded603a569 100644 --- a/src/mainboard/asi/mb_5blmp/devicetree.cb +++ b/src/mainboard/asi/mb_5blmp/devicetree.cb @@ -37,11 +37,6 @@ chip northbridge/amd/gx1 # Northbridge device pci 12.2 on end # IDE device pci 12.3 on end # Audio device pci 12.4 on end # VGA (onboard) - # device pci 12.4 on # VGA (onboard) - # chip drivers/pci/onboard - # device pci 12.4 on end - # end - # end device pci 13.0 on end # USB register "ide0_enable" = "1" register "ide1_enable" = "1" diff --git a/src/mainboard/asus/mew-vm/Config.lb b/src/mainboard/asus/mew-vm/Config.lb index e27f2d12cf..3cd4db2e5f 100644 --- a/src/mainboard/asus/mew-vm/Config.lb +++ b/src/mainboard/asus/mew-vm/Config.lb @@ -97,18 +97,14 @@ chip northbridge/intel/i82810 device pci_domain 0 on device pci 0.0 on end # Host bridge device pci 1.0 on # Onboard Video - #chip drivers/pci/onboard # device pci 1.0 on end - #end end chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1" register "ide1_enable" = "1" device pci 1e.0 on # PCI Bridge - #chip drivers/pci/onboard # device pci 1.0 on end - #end end device pci 1f.0 on # ISA/LPC? Bridge chip superio/smsc/lpc47b272 diff --git a/src/mainboard/asus/mew-vm/devicetree.cb b/src/mainboard/asus/mew-vm/devicetree.cb index 650aad1c42..0dc4b6f468 100644 --- a/src/mainboard/asus/mew-vm/devicetree.cb +++ b/src/mainboard/asus/mew-vm/devicetree.cb @@ -2,18 +2,14 @@ chip northbridge/intel/i82810 device pci_domain 0 on device pci 0.0 on end # Host bridge device pci 1.0 on # Onboard Video - #chip drivers/pci/onboard # device pci 1.0 on end - #end end chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1" register "ide1_enable" = "1" device pci 1e.0 on # PCI Bridge - #chip drivers/pci/onboard # device pci 1.0 on end - #end end device pci 1f.0 on # ISA/LPC? Bridge chip superio/smsc/lpc47b272 diff --git a/src/mainboard/broadcom/blast/Config.lb b/src/mainboard/broadcom/blast/Config.lb index 3b0d217437..238596d256 100644 --- a/src/mainboard/broadcom/blast/Config.lb +++ b/src/mainboard/broadcom/blast/Config.lb @@ -207,21 +207,8 @@ chip northbridge/amd/amdk8/root_complex device pci 2.0 on end # USB 0x0223 device pci 2.1 on end # USB device pci 2.2 on end # USB - #when CONFIG_HT_CHAIN_END_UNITID_BASE (0,1) < CONFIG_HT_CHAIN_UNITID_BASE (6,,,,), - chip drivers/pci/onboard - device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address - # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 5, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 4 - end + device pci 4.0 on end # it is in bcm5785_0 bus end - #when CONFIG_HT_CHAIN_END_UNITID_BASE > CONFIG_HT_CHAIN_UNITID_BASE (6, ,,,,) -# chip drivers/pci/onboard -# device pci 0.0 on end # fake, will be disabled -# end -# chip drivers/pci/onboard -# device pci 5.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed -# end - - end # device pci 18.0 device pci 18.0 on end diff --git a/src/mainboard/broadcom/blast/devicetree.cb b/src/mainboard/broadcom/blast/devicetree.cb index b9dc91b720..a9cabe6bea 100644 --- a/src/mainboard/broadcom/blast/devicetree.cb +++ b/src/mainboard/broadcom/blast/devicetree.cb @@ -105,21 +105,8 @@ chip northbridge/amd/amdk8/root_complex device pci 2.0 on end # USB 0x0223 device pci 2.1 on end # USB device pci 2.2 on end # USB - #when CONFIG_HT_CHAIN_END_UNITID_BASE (0,1) < CONFIG_HT_CHAIN_UNITID_BASE (6,,,,), - chip drivers/pci/onboard - device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address - # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 5, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 4 - end + device pci 4.0 on end # it is in bcm5785_0 bus end - #when CONFIG_HT_CHAIN_END_UNITID_BASE > CONFIG_HT_CHAIN_UNITID_BASE (6, ,,,,) -# chip drivers/pci/onboard -# device pci 0.0 on end # fake, will be disabled -# end -# chip drivers/pci/onboard -# device pci 5.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed -# end - - end # device pci 18.0 device pci 18.0 on end diff --git a/src/mainboard/digitallogic/msm586seg/Config.lb b/src/mainboard/digitallogic/msm586seg/Config.lb index ef8a0eb69c..dbd3e64447 100644 --- a/src/mainboard/digitallogic/msm586seg/Config.lb +++ b/src/mainboard/digitallogic/msm586seg/Config.lb @@ -102,13 +102,8 @@ config chip.h chip cpu/amd/sc520 device pci_domain 0 on device pci 0.0 on end - - chip drivers/pci/onboard - device pci 12.0 on end # enet - end - chip drivers/pci/onboard - device pci 14.0 on end # 69000 - end + device pci 12.0 on end # enet + device pci 14.0 on end # 69000 # register "com1" = "{1}" # register "com1" = "{1, 0, 0x3f8, 4}" end diff --git a/src/mainboard/digitallogic/msm586seg/devicetree.cb b/src/mainboard/digitallogic/msm586seg/devicetree.cb index 35db84ed8b..05067ca632 100644 --- a/src/mainboard/digitallogic/msm586seg/devicetree.cb +++ b/src/mainboard/digitallogic/msm586seg/devicetree.cb @@ -1,13 +1,8 @@ chip cpu/amd/sc520 device pci_domain 0 on device pci 0.0 on end - - chip drivers/pci/onboard - device pci 12.0 on end # enet - end - chip drivers/pci/onboard - device pci 14.0 on end # 69000 - end + device pci 12.0 on end # enet + device pci 14.0 on end # 69000 # register "com1" = "{1}" # register "com1" = "{1, 0, 0x3f8, 4}" end diff --git a/src/mainboard/emulation/qemu-x86/mainboard.c b/src/mainboard/emulation/qemu-x86/mainboard.c index 5ee62e9df7..4982b71b27 100644 --- a/src/mainboard/emulation/qemu-x86/mainboard.c +++ b/src/mainboard/emulation/qemu-x86/mainboard.c @@ -16,7 +16,6 @@ static void qemu_init(device_t dev) * force coreboot to use it. */ dev->on_mainboard = 1; - dev->rom_address = 0xc0000; /* Now do the usual initialization */ pci_dev_init(dev); diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Config.lb b/src/mainboard/gigabyte/ga_2761gxdk/Config.lb index b043e275b5..40a96f4ce1 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/Config.lb +++ b/src/mainboard/gigabyte/ga_2761gxdk/Config.lb @@ -178,9 +178,7 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/sis/sis966 device pci 0.0 on end # Northbridge device pci 1.0 on # AGP bridge - chip drivers/pci/onboard # Integrated VGA device pci 0.0 on end - end end device pci 2.0 on # LPC chip superio/ite/it8716f diff --git a/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb b/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb index 5ab88f4a39..08670bdf78 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb +++ b/src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb @@ -11,9 +11,7 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/sis/sis966 device pci 0.0 on end # Northbridge device pci 1.0 on # AGP bridge - chip drivers/pci/onboard # Integrated VGA device pci 0.0 on end - end end device pci 2.0 on # LPC chip superio/ite/it8716f diff --git a/src/mainboard/hp/dl145_g3/Config.lb b/src/mainboard/hp/dl145_g3/Config.lb index e0eb5d3ca8..6c0508e217 100644 --- a/src/mainboard/hp/dl145_g3/Config.lb +++ b/src/mainboard/hp/dl145_g3/Config.lb @@ -195,15 +195,6 @@ chip northbridge/amd/amdk8/root_complex device pci 2.1 on end # USB device pci 2.2 on end # USB device pci 3.0 on end # VGA - - #bx_a013+ start - #chip drivers/pci/onboard #SATA2 - # device pci 5.0 on end - # device pci 5.1 on end - # device pci 5.2 on end - # device pci 5.3 on end - #end - #bx_a013+ end end end device pci 18.0 on end diff --git a/src/mainboard/hp/dl145_g3/devicetree.cb b/src/mainboard/hp/dl145_g3/devicetree.cb index 0d038d333e..80b9b33f84 100644 --- a/src/mainboard/hp/dl145_g3/devicetree.cb +++ b/src/mainboard/hp/dl145_g3/devicetree.cb @@ -72,15 +72,6 @@ chip northbridge/amd/amdk8/root_complex device pci 2.1 on end # USB device pci 2.2 on end # USB device pci 3.0 on end # VGA - - #bx_a013+ start - #chip drivers/pci/onboard #SATA2 - # device pci 5.0 on end - # device pci 5.1 on end - # device pci 5.2 on end - # device pci 5.3 on end - #end - #bx_a013+ end end end device pci 18.0 on end diff --git a/src/mainboard/hp/e_vectra_p2706t/Config.lb b/src/mainboard/hp/e_vectra_p2706t/Config.lb index 535c30caa0..c158b8178b 100644 --- a/src/mainboard/hp/e_vectra_p2706t/Config.lb +++ b/src/mainboard/hp/e_vectra_p2706t/Config.lb @@ -76,9 +76,7 @@ chip northbridge/intel/i82810 # Northbridge end device pci_domain 0 on device pci 0.0 on end # Host bridge - chip drivers/pci/onboard # Onboard VGA - device pci 1.0 on end - end + device pci 1.0 on end # Onboard VGA chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1" register "ide1_enable" = "1" diff --git a/src/mainboard/hp/e_vectra_p2706t/devicetree.cb b/src/mainboard/hp/e_vectra_p2706t/devicetree.cb index a10dee89fc..82209d4317 100644 --- a/src/mainboard/hp/e_vectra_p2706t/devicetree.cb +++ b/src/mainboard/hp/e_vectra_p2706t/devicetree.cb @@ -7,9 +7,7 @@ chip northbridge/intel/i82810 # Northbridge end device pci_domain 0 on device pci 0.0 on end # Host bridge - chip drivers/pci/onboard # Onboard VGA - device pci 1.0 on end - end + device pci 1.0 on end # Onboard VGA chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1" register "ide1_enable" = "1" diff --git a/src/mainboard/ibm/e326/Config.lb b/src/mainboard/ibm/e326/Config.lb index 39ba3e2fad..08109ee165 100644 --- a/src/mainboard/ibm/e326/Config.lb +++ b/src/mainboard/ibm/e326/Config.lb @@ -125,9 +125,7 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 on end device pci 1.0 off end - chip drivers/pci/onboard - device pci 5.0 on end # ATI Rage XL - end + device pci 5.0 on end # ATI Rage XL end device pci 1.0 on chip superio/nsc/pc87366 diff --git a/src/mainboard/ibm/e326/devicetree.cb b/src/mainboard/ibm/e326/devicetree.cb index 2e634e0058..a8576968cb 100644 --- a/src/mainboard/ibm/e326/devicetree.cb +++ b/src/mainboard/ibm/e326/devicetree.cb @@ -21,9 +21,7 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 on end device pci 1.0 off end - chip drivers/pci/onboard - device pci 5.0 on end # ATI Rage XL - end + device pci 5.0 on end # ATI Rage XL end device pci 1.0 on chip superio/nsc/pc87366 diff --git a/src/mainboard/intel/d945gclf/Config.lb b/src/mainboard/intel/d945gclf/Config.lb index d9eee75168..1801753503 100644 --- a/src/mainboard/intel/d945gclf/Config.lb +++ b/src/mainboard/intel/d945gclf/Config.lb @@ -150,9 +150,7 @@ chip northbridge/intel/i945 device pci_domain 0 on device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port - chip drivers/pci/onboard - device pci 02.0 on end # vga controller - end + device pci 02.0 on end # vga controller device pci 02.1 on end # display controller chip southbridge/intel/i82801gx diff --git a/src/mainboard/intel/d945gclf/devicetree.cb b/src/mainboard/intel/d945gclf/devicetree.cb index eeab074f56..af5f22b302 100644 --- a/src/mainboard/intel/d945gclf/devicetree.cb +++ b/src/mainboard/intel/d945gclf/devicetree.cb @@ -28,9 +28,7 @@ chip northbridge/intel/i945 device pci_domain 0 on device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port - chip drivers/pci/onboard - device pci 02.0 on end # vga controller - end + device pci 02.0 on end # vga controller device pci 02.1 on end # display controller chip southbridge/intel/i82801gx diff --git a/src/mainboard/intel/xe7501devkit/Config.lb b/src/mainboard/intel/xe7501devkit/Config.lb index bad246a0df..1f0534c8c0 100644 --- a/src/mainboard/intel/xe7501devkit/Config.lb +++ b/src/mainboard/intel/xe7501devkit/Config.lb @@ -127,9 +127,7 @@ chip northbridge/intel/e7501 device pci 1d.1 off end # USB (not populated) device pci 1d.2 off end # USB (not populated) device pci 1e.0 on # Hub to PCI bridge - chip drivers/pci/onboard # VGA ROM - device pci 0.0 on end - end + device pci 0.0 on end end device pci 1f.0 on # LPC bridge chip superio/smsc/lpc47b272 diff --git a/src/mainboard/intel/xe7501devkit/devicetree.cb b/src/mainboard/intel/xe7501devkit/devicetree.cb index e5873a23af..00ed4eca84 100644 --- a/src/mainboard/intel/xe7501devkit/devicetree.cb +++ b/src/mainboard/intel/xe7501devkit/devicetree.cb @@ -25,9 +25,7 @@ chip northbridge/intel/e7501 device pci 1d.1 off end # USB (not populated) device pci 1d.2 off end # USB (not populated) device pci 1e.0 on # Hub to PCI bridge - chip drivers/pci/onboard # VGA ROM - device pci 0.0 on end - end + device pci 0.0 on end end device pci 1f.0 on # LPC bridge chip superio/smsc/lpc47b272 diff --git a/src/mainboard/iwill/dk8_htx/Config.lb b/src/mainboard/iwill/dk8_htx/Config.lb index fc55d57a23..c5019183dd 100644 --- a/src/mainboard/iwill/dk8_htx/Config.lb +++ b/src/mainboard/iwill/dk8_htx/Config.lb @@ -232,9 +232,6 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 off end device pci 1.0 off end - #chip drivers/pci/onboard - # device pci 6.0 on end - #end end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/iwill/dk8_htx/devicetree.cb b/src/mainboard/iwill/dk8_htx/devicetree.cb index b1d0d79bf1..cfddca953d 100644 --- a/src/mainboard/iwill/dk8_htx/devicetree.cb +++ b/src/mainboard/iwill/dk8_htx/devicetree.cb @@ -24,9 +24,6 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 off end device pci 1.0 off end - #chip drivers/pci/onboard - # device pci 6.0 on end - #end end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/kontron/986lcd-m/Config.lb b/src/mainboard/kontron/986lcd-m/Config.lb index e89fc82c0e..a5d48f9a43 100644 --- a/src/mainboard/kontron/986lcd-m/Config.lb +++ b/src/mainboard/kontron/986lcd-m/Config.lb @@ -153,9 +153,7 @@ chip northbridge/intel/i945 device pci 00.0 on end # host bridge # autodetect 0:1.0 because it might or might not be there. # device pci 01.0 off end # i945 PCIe root port - chip drivers/pci/onboard - device pci 02.0 on end # vga controller - end + device pci 02.0 on end # vga controller device pci 02.1 on end # display controller chip southbridge/intel/i82801gx diff --git a/src/mainboard/kontron/986lcd-m/devicetree.cb b/src/mainboard/kontron/986lcd-m/devicetree.cb index 8cd34b4f96..3b4a5179fb 100644 --- a/src/mainboard/kontron/986lcd-m/devicetree.cb +++ b/src/mainboard/kontron/986lcd-m/devicetree.cb @@ -9,9 +9,7 @@ chip northbridge/intel/i945 device pci_domain 0 on device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port - chip drivers/pci/onboard - device pci 02.0 on end # vga controller - end + device pci 02.0 on end # vga controller device pci 02.1 on end # display controller chip southbridge/intel/i82801gx diff --git a/src/mainboard/kontron/kt690/Config.lb b/src/mainboard/kontron/kt690/Config.lb index 3a182b7ba9..3cddb5166e 100644 --- a/src/mainboard/kontron/kt690/Config.lb +++ b/src/mainboard/kontron/kt690/Config.lb @@ -155,9 +155,7 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/rs690 device pci 0.0 on end # HT 0x7910 device pci 1.0 on # Internal Graphics P2P bridge 0x7912 - chip drivers/pci/onboard - device pci 5.0 on end # Internal Graphics 0x791F - end + device pci 5.0 on end # Internal Graphics 0x791F end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 device pci 3.0 off end # PCIE P2P bridge 0x791b diff --git a/src/mainboard/kontron/kt690/devicetree.cb b/src/mainboard/kontron/kt690/devicetree.cb index 5983bbafd9..dc7df48f67 100644 --- a/src/mainboard/kontron/kt690/devicetree.cb +++ b/src/mainboard/kontron/kt690/devicetree.cb @@ -20,9 +20,7 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/rs690 device pci 0.0 on end # HT 0x7910 device pci 1.0 on # Internal Graphics P2P bridge 0x7912 - chip drivers/pci/onboard - device pci 5.0 on end # Internal Graphics 0x791F - end + device pci 5.0 on end # Internal Graphics 0x791F end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 device pci 3.0 off end # PCIE P2P bridge 0x791b diff --git a/src/mainboard/mitac/6513wu/Config.lb b/src/mainboard/mitac/6513wu/Config.lb index 9072349fc5..a6480bd585 100644 --- a/src/mainboard/mitac/6513wu/Config.lb +++ b/src/mainboard/mitac/6513wu/Config.lb @@ -80,9 +80,7 @@ chip northbridge/intel/i82810 # Northbridge end device pci_domain 0 on # PCI domain device pci 0.0 on end # Graphics Memory Controller Hub (GMCH) - chip drivers/pci/onboard - device pci 1.0 on end - end + device pci 1.0 on end chip southbridge/intel/i82801xx # Southbridge register "pirqa_routing" = "0x03" register "pirqb_routing" = "0x05" diff --git a/src/mainboard/mitac/6513wu/devicetree.cb b/src/mainboard/mitac/6513wu/devicetree.cb index b78dd3aab9..0369775c07 100644 --- a/src/mainboard/mitac/6513wu/devicetree.cb +++ b/src/mainboard/mitac/6513wu/devicetree.cb @@ -26,9 +26,7 @@ chip northbridge/intel/i82810 # Northbridge end device pci_domain 0 on # PCI domain device pci 0.0 on end # Graphics Memory Controller Hub (GMCH) - chip drivers/pci/onboard - device pci 1.0 on end - end + device pci 1.0 on end chip southbridge/intel/i82801xx # Southbridge register "pirqa_routing" = "0x03" register "pirqb_routing" = "0x05" diff --git a/src/mainboard/msi/ms6178/Config.lb b/src/mainboard/msi/ms6178/Config.lb index 5c6f9c06bc..3f77f30555 100644 --- a/src/mainboard/msi/ms6178/Config.lb +++ b/src/mainboard/msi/ms6178/Config.lb @@ -75,9 +75,7 @@ chip northbridge/intel/i82810 # Northbridge end device pci_domain 0 on device pci 0.0 on end # Host bridge - chip drivers/pci/onboard # Onboard VGA - device pci 1.0 on end - end + device pci 1.0 on end # Onboard VGA chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1" register "ide1_enable" = "1" diff --git a/src/mainboard/msi/ms6178/devicetree.cb b/src/mainboard/msi/ms6178/devicetree.cb index 1676ab5a9a..baa0e040b8 100644 --- a/src/mainboard/msi/ms6178/devicetree.cb +++ b/src/mainboard/msi/ms6178/devicetree.cb @@ -26,9 +26,7 @@ chip northbridge/intel/i82810 # Northbridge end device pci_domain 0 on device pci 0.0 on end # Host bridge - chip drivers/pci/onboard # Onboard VGA - device pci 1.0 on end - end + device pci 1.0 on end # Onboard VGA chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1" register "ide1_enable" = "1" diff --git a/src/mainboard/msi/ms9185/Config.lb b/src/mainboard/msi/ms9185/Config.lb index 0af1b60c4c..c3bddcfe1f 100644 --- a/src/mainboard/msi/ms9185/Config.lb +++ b/src/mainboard/msi/ms9185/Config.lb @@ -207,29 +207,8 @@ chip northbridge/amd/amdk8/root_complex device pci 2.0 on end # USB 0x0223 device pci 2.1 on end # USB device pci 2.2 on end # USB - #when CONFIG_HT_CHAIN_END_UNITID_BASE (0,1) < CONFIG_HT_CHAIN_UNITID_BASE (6,,,,), - chip drivers/pci/onboard - device pci 3.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address - # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 4, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 3 - end - #bx_a013+ start - #chip drivers/pci/onboard #SATA2 - # device pci 5.0 on end - # device pci 5.1 on end - # device pci 5.2 on end - # device pci 5.3 on end - #end - #bx_a013+ end - + device pci 3.0 on end # it is in bcm5785_0 bus end - #when CONFIG_HT_CHAIN_END_UNITID_BASE > CONFIG_HT_CHAIN_UNITID_BASE (6, ,,,,) -# chip drivers/pci/onboard -# device pci 0.0 on end # fake, will be disabled -# end -# chip drivers/pci/onboard -# device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed -# end - end # device pci 18.0 device pci 18.1 on end device pci 18.2 on end diff --git a/src/mainboard/msi/ms9185/devicetree.cb b/src/mainboard/msi/ms9185/devicetree.cb index 3f02199d69..720075ba2a 100644 --- a/src/mainboard/msi/ms9185/devicetree.cb +++ b/src/mainboard/msi/ms9185/devicetree.cb @@ -73,29 +73,8 @@ chip northbridge/amd/amdk8/root_complex device pci 2.0 on end # USB 0x0223 device pci 2.1 on end # USB device pci 2.2 on end # USB - #when CONFIG_HT_CHAIN_END_UNITID_BASE (0,1) < CONFIG_HT_CHAIN_UNITID_BASE (6,,,,), - chip drivers/pci/onboard - device pci 3.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed, fake one to get the rom_address - # if CONFIG_HT_CHAIN_END_UNITID_BASE=0, it is 4, if CONFIG_HT_CHAIN_END_UNITID_BASE=1, it is 3 - end - #bx_a013+ start - #chip drivers/pci/onboard #SATA2 - # device pci 5.0 on end - # device pci 5.1 on end - # device pci 5.2 on end - # device pci 5.3 on end - #end - #bx_a013+ end - + device pci 3.0 on end # it is in bcm5785_0 bus end - #when CONFIG_HT_CHAIN_END_UNITID_BASE > CONFIG_HT_CHAIN_UNITID_BASE (6, ,,,,) -# chip drivers/pci/onboard -# device pci 0.0 on end # fake, will be disabled -# end -# chip drivers/pci/onboard -# device pci 4.0 on end # it is in bcm5785_0 bus, but the device id can not be changed even unitid is changed -# end - end # device pci 18.0 device pci 18.1 on end device pci 18.2 on end diff --git a/src/mainboard/msi/ms9282/Config.lb b/src/mainboard/msi/ms9282/Config.lb index c0c4ed10e6..8faf6117f4 100644 --- a/src/mainboard/msi/ms9282/Config.lb +++ b/src/mainboard/msi/ms9282/Config.lb @@ -278,27 +278,21 @@ chip northbridge/amd/amdk8/root_complex device pci 5.1 on end # SATA 1 device pci 5.2 on end # SATA 2 device pci 6.0 on #P2P - chip drivers/pci/onboard - device pci 4.0 on end - end + device pci 4.0 on end end # P2P device pci 7.0 on end # reserve device pci 8.0 on end # MAC0 device pci 9.0 on end # MAC1 device pci a.0 on device pci 0.0 on - chip drivers/pci/onboard - device pci 4.0 on end #pci_E lan1 - device pci 4.1 on end #pci_E lan2 - end + device pci 4.0 on end #pci_E lan1 + device pci 4.1 on end #pci_E lan2 end end # 0x376 device pci b.0 on end # PCI E 0x374 device pci c.0 on end device pci d.0 on #SAS - chip drivers/pci/onboard - device pci 0.0 on end - end + device pci 0.0 on end end # PCI E 1 0x378 device pci e.0 on end # PCI E 0 0x375 device pci f.0 on end #PCI E 0x377 pci_E slot diff --git a/src/mainboard/msi/ms9282/devicetree.cb b/src/mainboard/msi/ms9282/devicetree.cb index bf334408e8..0287f13bf3 100644 --- a/src/mainboard/msi/ms9282/devicetree.cb +++ b/src/mainboard/msi/ms9282/devicetree.cb @@ -137,27 +137,21 @@ chip northbridge/amd/amdk8/root_complex device pci 5.1 on end # SATA 1 device pci 5.2 on end # SATA 2 device pci 6.0 on #P2P - chip drivers/pci/onboard - device pci 4.0 on end - end + device pci 4.0 on end end # P2P device pci 7.0 on end # reserve device pci 8.0 on end # MAC0 device pci 9.0 on end # MAC1 device pci a.0 on device pci 0.0 on - chip drivers/pci/onboard - device pci 4.0 on end #pci_E lan1 - device pci 4.1 on end #pci_E lan2 - end + device pci 4.0 on end #pci_E lan1 + device pci 4.1 on end #pci_E lan2 end end # 0x376 device pci b.0 on end # PCI E 0x374 device pci c.0 on end device pci d.0 on #SAS - chip drivers/pci/onboard - device pci 0.0 on end - end + device pci 0.0 on end end # PCI E 1 0x378 device pci e.0 on end # PCI E 0 0x375 device pci f.0 on end #PCI E 0x377 pci_E slot diff --git a/src/mainboard/nec/powermate2000/Config.lb b/src/mainboard/nec/powermate2000/Config.lb index ff75437720..e63b1475dd 100644 --- a/src/mainboard/nec/powermate2000/Config.lb +++ b/src/mainboard/nec/powermate2000/Config.lb @@ -75,11 +75,7 @@ chip northbridge/intel/i82810 # Northbridge end device pci_domain 0 on device pci 0.0 on end # Host bridge - device pci 1.0 off # Onboard video - # chip drivers/pci/onboard - # device pci 1.0 on end - # end - end + device pci 1.0 off end # Onboard video chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1" register "ide1_enable" = "1" diff --git a/src/mainboard/nec/powermate2000/devicetree.cb b/src/mainboard/nec/powermate2000/devicetree.cb index 5af5986a5a..0cb7e328b5 100644 --- a/src/mainboard/nec/powermate2000/devicetree.cb +++ b/src/mainboard/nec/powermate2000/devicetree.cb @@ -6,11 +6,7 @@ chip northbridge/intel/i82810 # Northbridge end device pci_domain 0 on device pci 0.0 on end # Host bridge - device pci 1.0 off # Onboard video - # chip drivers/pci/onboard - # device pci 1.0 on end - # end - end + device pci 1.0 off end # Onboard video chip southbridge/intel/i82801xx # Southbridge register "ide0_enable" = "1" register "ide1_enable" = "1" diff --git a/src/mainboard/newisys/khepri/Config.lb b/src/mainboard/newisys/khepri/Config.lb index 913f34a424..f053e669a9 100644 --- a/src/mainboard/newisys/khepri/Config.lb +++ b/src/mainboard/newisys/khepri/Config.lb @@ -98,8 +98,6 @@ end config chip.h -# FIXME: ROM for onboard VGA - chip northbridge/amd/amdk8/root_complex device apic_cluster 0 on chip cpu/amd/socket_940 diff --git a/src/mainboard/rca/rm4100/Config.lb b/src/mainboard/rca/rm4100/Config.lb index 727077d6be..648be3427f 100644 --- a/src/mainboard/rca/rm4100/Config.lb +++ b/src/mainboard/rca/rm4100/Config.lb @@ -75,9 +75,7 @@ config chip.h chip northbridge/intel/i82830 # Northbridge device pci_domain 0 on # PCI domain device pci 0.0 on end # Host bridge - chip drivers/pci/onboard # Onboard VGA - device pci 2.0 on end # VGA (Intel 82830 CGC) - end + device pci 2.0 on end # VGA (Intel 82830 CGC) chip southbridge/intel/i82801xx # Southbridge register "pirqa_routing" = "0x05" register "pirqb_routing" = "0x06" diff --git a/src/mainboard/rca/rm4100/devicetree.cb b/src/mainboard/rca/rm4100/devicetree.cb index f67692d8df..1844932114 100644 --- a/src/mainboard/rca/rm4100/devicetree.cb +++ b/src/mainboard/rca/rm4100/devicetree.cb @@ -1,9 +1,7 @@ chip northbridge/intel/i82830 # Northbridge device pci_domain 0 on # PCI domain device pci 0.0 on end # Host bridge - chip drivers/pci/onboard # Onboard VGA - device pci 2.0 on end # VGA (Intel 82830 CGC) - end + device pci 2.0 on end # VGA (Intel 82830 CGC) chip southbridge/intel/i82801xx # Southbridge register "pirqa_routing" = "0x05" register "pirqb_routing" = "0x06" diff --git a/src/mainboard/sunw/ultra40/Config.lb b/src/mainboard/sunw/ultra40/Config.lb index 6fedd3a7ed..b00c2bc331 100644 --- a/src/mainboard/sunw/ultra40/Config.lb +++ b/src/mainboard/sunw/ultra40/Config.lb @@ -210,8 +210,6 @@ chip northbridge/amd/amdk8/root_complex register "ide1_enable" = "1" register "sata0_enable" = "1" register "sata1_enable" = "1" -# register "nic_rom_address" = "0xfff80000" # 64k -# register "raid_rom_address" = "0xfff90000" register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 register "mac_eeprom_addr" = "0x51" end @@ -243,7 +241,6 @@ chip northbridge/amd/amdk8/root_complex device pci c.0 off end # PCI E 2 device pci d.0 off end # PCI E 1 device pci e.0 on end # PCI E 0 -# register "nic_rom_address" = "0xfff80000" # 64k register "mac_eeprom_smbus" = "3" register "mac_eeprom_addr" = "0x51" end diff --git a/src/mainboard/sunw/ultra40/devicetree.cb b/src/mainboard/sunw/ultra40/devicetree.cb index 01a59f714e..afa6f66beb 100644 --- a/src/mainboard/sunw/ultra40/devicetree.cb +++ b/src/mainboard/sunw/ultra40/devicetree.cb @@ -106,8 +106,6 @@ chip northbridge/amd/amdk8/root_complex register "ide1_enable" = "1" register "sata0_enable" = "1" register "sata1_enable" = "1" -# register "nic_rom_address" = "0xfff80000" # 64k -# register "raid_rom_address" = "0xfff90000" register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 register "mac_eeprom_addr" = "0x51" end @@ -139,7 +137,6 @@ chip northbridge/amd/amdk8/root_complex device pci c.0 off end # PCI E 2 device pci d.0 off end # PCI E 1 device pci e.0 on end # PCI E 0 -# register "nic_rom_address" = "0xfff80000" # 64k register "mac_eeprom_smbus" = "3" register "mac_eeprom_addr" = "0x51" end diff --git a/src/mainboard/supermicro/h8dme/Config.lb b/src/mainboard/supermicro/h8dme/Config.lb index 2bc901af10..2141907900 100644 --- a/src/mainboard/supermicro/h8dme/Config.lb +++ b/src/mainboard/supermicro/h8dme/Config.lb @@ -254,9 +254,7 @@ chip northbridge/amd/amdk8/root_complex device pci 5.1 on end # SATA 1 device pci 5.2 on end # SATA 2 device pci 6.0 on # PCI - chip drivers/pci/onboard - device pci 6.0 on end - end + device pci 6.0 on end end device pci 6.1 on end # AZA device pci 8.0 on end # NIC diff --git a/src/mainboard/supermicro/h8dme/devicetree.cb b/src/mainboard/supermicro/h8dme/devicetree.cb index 6df22c4f44..5d6776a3f2 100644 --- a/src/mainboard/supermicro/h8dme/devicetree.cb +++ b/src/mainboard/supermicro/h8dme/devicetree.cb @@ -92,9 +92,7 @@ chip northbridge/amd/amdk8/root_complex device pci 5.1 on end # SATA 1 device pci 5.2 on end # SATA 2 device pci 6.0 on # PCI - chip drivers/pci/onboard - device pci 6.0 on end - end + device pci 6.0 on end end device pci 6.1 on end # AZA device pci 8.0 on end # NIC diff --git a/src/mainboard/supermicro/h8dmr/Config.lb b/src/mainboard/supermicro/h8dmr/Config.lb index 76f8e70aa1..cc95167ddf 100644 --- a/src/mainboard/supermicro/h8dmr/Config.lb +++ b/src/mainboard/supermicro/h8dmr/Config.lb @@ -276,9 +276,7 @@ chip northbridge/amd/amdk8/root_complex device pci 5.1 on end # SATA 1 device pci 5.2 on end # SATA 2 device pci 6.0 on # PCI - chip drivers/pci/onboard - device pci 6.0 on end - end + device pci 6.0 on end end device pci 6.1 on end # AZA device pci 8.0 on end # NIC diff --git a/src/mainboard/supermicro/h8dmr/devicetree.cb b/src/mainboard/supermicro/h8dmr/devicetree.cb index 9a09f1cc49..d83f00637d 100644 --- a/src/mainboard/supermicro/h8dmr/devicetree.cb +++ b/src/mainboard/supermicro/h8dmr/devicetree.cb @@ -112,9 +112,7 @@ chip northbridge/amd/amdk8/root_complex device pci 5.1 on end # SATA 1 device pci 5.2 on end # SATA 2 device pci 6.0 on # PCI - chip drivers/pci/onboard - device pci 6.0 on end - end + device pci 6.0 on end end device pci 6.1 on end # AZA device pci 8.0 on end # NIC diff --git a/src/mainboard/supermicro/h8dmr_fam10/Config.lb b/src/mainboard/supermicro/h8dmr_fam10/Config.lb index 31341bd0e1..cd9dd541e2 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/Config.lb +++ b/src/mainboard/supermicro/h8dmr_fam10/Config.lb @@ -280,9 +280,7 @@ chip northbridge/amd/amdfam10/root_complex device pci 5.1 on end # SATA 1 device pci 5.2 on end # SATA 2 device pci 6.0 on # PCI - chip drivers/pci/onboard - device pci 6.0 on end - end + device pci 6.0 on end end device pci 6.1 on end # AZA device pci 8.0 on end # NIC diff --git a/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb b/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb index 35cf05235f..9b93eef507 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb +++ b/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb @@ -114,9 +114,7 @@ chip northbridge/amd/amdfam10/root_complex device pci 5.1 on end # SATA 1 device pci 5.2 on end # SATA 2 device pci 6.0 on # PCI - chip drivers/pci/onboard - device pci 6.0 on end - end + device pci 6.0 on end end device pci 6.1 on end # AZA device pci 8.0 on end # NIC diff --git a/src/mainboard/technexion/tim5690/Config.lb b/src/mainboard/technexion/tim5690/Config.lb index d400a2d6c9..d065ba954d 100644 --- a/src/mainboard/technexion/tim5690/Config.lb +++ b/src/mainboard/technexion/tim5690/Config.lb @@ -155,9 +155,7 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/rs690 device pci 0.0 on end # HT 0x7910 device pci 1.0 on # Internal Graphics P2P bridge 0x7912 - chip drivers/pci/onboard - device pci 5.0 on end # Internal Graphics 0x791F - end + device pci 5.0 on end # Internal Graphics 0x791F end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 device pci 3.0 off end # PCIE P2P bridge 0x791b diff --git a/src/mainboard/technexion/tim5690/devicetree.cb b/src/mainboard/technexion/tim5690/devicetree.cb index 8bd6fe1f9d..ddad732f20 100644 --- a/src/mainboard/technexion/tim5690/devicetree.cb +++ b/src/mainboard/technexion/tim5690/devicetree.cb @@ -20,9 +20,7 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/rs690 device pci 0.0 on end # HT 0x7910 device pci 1.0 on # Internal Graphics P2P bridge 0x7912 - chip drivers/pci/onboard - device pci 5.0 on end # Internal Graphics 0x791F - end + device pci 5.0 on end # Internal Graphics 0x791F end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 device pci 3.0 off end # PCIE P2P bridge 0x791b diff --git a/src/mainboard/technexion/tim8690/Config.lb b/src/mainboard/technexion/tim8690/Config.lb index 8fffd80411..fde48a1cc2 100644 --- a/src/mainboard/technexion/tim8690/Config.lb +++ b/src/mainboard/technexion/tim8690/Config.lb @@ -155,9 +155,7 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/rs690 device pci 0.0 on end # HT 0x7910 device pci 1.0 on # Internal Graphics P2P bridge 0x7912 - chip drivers/pci/onboard - device pci 5.0 on end # Internal Graphics 0x791F - end + device pci 5.0 on end # Internal Graphics 0x791F end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 device pci 3.0 off end # PCIE P2P bridge 0x791b diff --git a/src/mainboard/technexion/tim8690/devicetree.cb b/src/mainboard/technexion/tim8690/devicetree.cb index 10de5c16c8..a12e82db13 100644 --- a/src/mainboard/technexion/tim8690/devicetree.cb +++ b/src/mainboard/technexion/tim8690/devicetree.cb @@ -20,9 +20,7 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/rs690 device pci 0.0 on end # HT 0x7910 device pci 1.0 on # Internal Graphics P2P bridge 0x7912 - chip drivers/pci/onboard - device pci 5.0 on end # Internal Graphics 0x791F - end + device pci 5.0 on end # Internal Graphics 0x791F end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 device pci 3.0 off end # PCIE P2P bridge 0x791b diff --git a/src/mainboard/technologic/ts5300/Config.lb b/src/mainboard/technologic/ts5300/Config.lb index 5b665f9ad7..fdc26ea8df 100644 --- a/src/mainboard/technologic/ts5300/Config.lb +++ b/src/mainboard/technologic/ts5300/Config.lb @@ -104,12 +104,6 @@ chip cpu/amd/sc520 device pci_domain 0 on device pci 0.0 on end -# chip drivers/pci/onboard -# device pci 12.0 on end # enet -# end -# chip drivers/pci/onboard -# device pci 14.0 on end # 69000 -# end # register "com1" = "{1}" # register "com1" = "{1, 0, 0x3f8, 4}" end diff --git a/src/mainboard/technologic/ts5300/devicetree.cb b/src/mainboard/technologic/ts5300/devicetree.cb index 5823155cdb..65809cb2f4 100644 --- a/src/mainboard/technologic/ts5300/devicetree.cb +++ b/src/mainboard/technologic/ts5300/devicetree.cb @@ -2,12 +2,6 @@ chip cpu/amd/sc520 device pci_domain 0 on device pci 0.0 on end -# chip drivers/pci/onboard -# device pci 12.0 on end # enet -# end -# chip drivers/pci/onboard -# device pci 14.0 on end # 69000 -# end # register "com1" = "{1}" # register "com1" = "{1, 0, 0x3f8, 4}" end diff --git a/src/mainboard/thomson/ip1000/Config.lb b/src/mainboard/thomson/ip1000/Config.lb index 8eaa606ac4..a509341c07 100644 --- a/src/mainboard/thomson/ip1000/Config.lb +++ b/src/mainboard/thomson/ip1000/Config.lb @@ -75,9 +75,7 @@ config chip.h chip northbridge/intel/i82830 # Northbridge device pci_domain 0 on # PCI domain device pci 0.0 on end # Host bridge - chip drivers/pci/onboard # Onboard VGA - device pci 2.0 on end # VGA (Intel 82830 CGC) - end + device pci 2.0 on end # VGA (Intel 82830 CGC) chip southbridge/intel/i82801xx # Southbridge register "pirqa_routing" = "0x05" register "pirqb_routing" = "0x06" diff --git a/src/mainboard/thomson/ip1000/devicetree.cb b/src/mainboard/thomson/ip1000/devicetree.cb index aa0f3f93da..7f5c42a8cf 100644 --- a/src/mainboard/thomson/ip1000/devicetree.cb +++ b/src/mainboard/thomson/ip1000/devicetree.cb @@ -1,9 +1,7 @@ chip northbridge/intel/i82830 # Northbridge device pci_domain 0 on # PCI domain device pci 0.0 on end # Host bridge - chip drivers/pci/onboard # Onboard VGA - device pci 2.0 on end # VGA (Intel 82830 CGC) - end + device pci 2.0 on end # VGA (Intel 82830 CGC) chip southbridge/intel/i82801xx # Southbridge register "pirqa_routing" = "0x05" register "pirqb_routing" = "0x06" diff --git a/src/mainboard/tyan/s2735/Config.lb b/src/mainboard/tyan/s2735/Config.lb index ae5de634e8..4f9fc5b20b 100644 --- a/src/mainboard/tyan/s2735/Config.lb +++ b/src/mainboard/tyan/s2735/Config.lb @@ -100,10 +100,8 @@ chip northbridge/intel/e7501 chip southbridge/intel/i82870 device pci 1c.0 on end device pci 1d.0 on - chip drivers/pci/onboard - device pci 1.0 on end # intel lan - device pci 1.1 on end - end + device pci 1.0 on end # intel lan + device pci 1.1 on end end device pci 1e.0 on end device pci 1f.0 on end @@ -117,12 +115,8 @@ chip northbridge/intel/e7501 device pci 1d.3 on end device pci 1d.7 on end device pci 1e.0 on - chip drivers/pci/onboard - device pci 1.0 on end # intel lan 10/100 - end - chip drivers/pci/onboard - device pci 2.0 on end # ati - end + device pci 1.0 on end # intel lan 10/100 + device pci 2.0 on end # ati end device pci 1f.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s2735/devicetree.cb b/src/mainboard/tyan/s2735/devicetree.cb index d491f6c6eb..0fdd57814a 100644 --- a/src/mainboard/tyan/s2735/devicetree.cb +++ b/src/mainboard/tyan/s2735/devicetree.cb @@ -6,10 +6,8 @@ chip northbridge/intel/e7501 chip southbridge/intel/i82870 device pci 1c.0 on end device pci 1d.0 on - chip drivers/pci/onboard - device pci 1.0 on end # intel lan - device pci 1.1 on end - end + device pci 1.0 on end # intel lan + device pci 1.1 on end end device pci 1e.0 on end device pci 1f.0 on end @@ -23,12 +21,8 @@ chip northbridge/intel/e7501 device pci 1d.3 on end device pci 1d.7 on end device pci 1e.0 on - chip drivers/pci/onboard - device pci 1.0 on end # intel lan 10/100 - end - chip drivers/pci/onboard - device pci 2.0 on end # ati - end + device pci 1.0 on end # intel lan 10/100 + device pci 2.0 on end # ati end device pci 1f.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s2850/Config.lb b/src/mainboard/tyan/s2850/Config.lb index 3eeb4319cb..eaa338e041 100644 --- a/src/mainboard/tyan/s2850/Config.lb +++ b/src/mainboard/tyan/s2850/Config.lb @@ -119,9 +119,7 @@ chip northbridge/amd/amdk8/root_complex device pci 0.2 off end device pci 1.0 off end #chip drivers/ati/ragexl - chip drivers/pci/onboard - device pci b.0 on end - end + device pci b.0 on end end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s2850/devicetree.cb b/src/mainboard/tyan/s2850/devicetree.cb index 1f93df19d3..264f8c7df6 100644 --- a/src/mainboard/tyan/s2850/devicetree.cb +++ b/src/mainboard/tyan/s2850/devicetree.cb @@ -17,9 +17,7 @@ chip northbridge/amd/amdk8/root_complex device pci 0.2 off end device pci 1.0 off end #chip drivers/ati/ragexl - chip drivers/pci/onboard - device pci b.0 on end - end + device pci b.0 on end end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s2875/Config.lb b/src/mainboard/tyan/s2875/Config.lb index f0d93d0b80..6145ba7428 100644 --- a/src/mainboard/tyan/s2875/Config.lb +++ b/src/mainboard/tyan/s2875/Config.lb @@ -123,9 +123,7 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 off end device pci 1.0 off end - chip drivers/pci/onboard - device pci 5.0 on end - end + device pci 5.0 on end end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s2875/devicetree.cb b/src/mainboard/tyan/s2875/devicetree.cb index 6c6bf69cfa..badb881777 100644 --- a/src/mainboard/tyan/s2875/devicetree.cb +++ b/src/mainboard/tyan/s2875/devicetree.cb @@ -21,9 +21,7 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 off end device pci 1.0 off end - chip drivers/pci/onboard - device pci 5.0 on end - end + device pci 5.0 on end end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s2880/Config.lb b/src/mainboard/tyan/s2880/Config.lb index 76018b156d..5e72afbbfb 100644 --- a/src/mainboard/tyan/s2880/Config.lb +++ b/src/mainboard/tyan/s2880/Config.lb @@ -113,10 +113,8 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/amd8131 # the on/off keyword is mandatory device pci 0.0 on - chip drivers/pci/onboard - device pci 9.0 on end #broadcom - device pci 9.1 on end - end + device pci 9.0 on end #broadcom + device pci 9.1 on end # chip drivers/lsi/53c1030 # device pci a.0 on end # device pci a.1 on end @@ -135,12 +133,8 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 off end device pci 1.0 off end - chip drivers/pci/onboard - device pci 5.0 on end #some sata - end - chip drivers/pci/onboard - device pci 6.0 on end #adti - end + device pci 5.0 on end #some sata + device pci 6.0 on end #adti end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s2880/devicetree.cb b/src/mainboard/tyan/s2880/devicetree.cb index 8593fb3573..122648e137 100644 --- a/src/mainboard/tyan/s2880/devicetree.cb +++ b/src/mainboard/tyan/s2880/devicetree.cb @@ -11,10 +11,8 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/amd8131 # the on/off keyword is mandatory device pci 0.0 on - chip drivers/pci/onboard - device pci 9.0 on end #broadcom - device pci 9.1 on end - end + device pci 9.0 on end #broadcom + device pci 9.1 on end # chip drivers/lsi/53c1030 # device pci a.0 on end # device pci a.1 on end @@ -33,12 +31,8 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 off end device pci 1.0 off end - chip drivers/pci/onboard - device pci 5.0 on end #some sata - end - chip drivers/pci/onboard - device pci 6.0 on end #adti - end + device pci 5.0 on end #some sata + device pci 6.0 on end #adti end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s2881/Config.lb b/src/mainboard/tyan/s2881/Config.lb index b959220f72..a46e0ef661 100644 --- a/src/mainboard/tyan/s2881/Config.lb +++ b/src/mainboard/tyan/s2881/Config.lb @@ -115,14 +115,10 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/amd8131 # the on/off keyword is mandatory device pci 0.0 on - chip drivers/pci/onboard - device pci 9.0 on end # Broadcom 5704 - device pci 9.1 on end - end - chip drivers/pci/onboard - device pci a.0 on end # Adaptic - device pci a.1 on end - end + device pci 9.0 on end # Broadcom 5704 + device pci 9.1 on end + device pci a.0 on end # Adaptic + device pci a.1 on end end device pci 0.1 on end device pci 1.0 on end @@ -136,12 +132,8 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 off end device pci 1.0 off end - chip drivers/pci/onboard - device pci 5.0 on end # SiI - end - chip drivers/pci/onboard - device pci 6.0 on end - end + device pci 5.0 on end # SiI + device pci 6.0 on end end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s2881/devicetree.cb b/src/mainboard/tyan/s2881/devicetree.cb index 7f1453bfa3..3c1f5bc276 100644 --- a/src/mainboard/tyan/s2881/devicetree.cb +++ b/src/mainboard/tyan/s2881/devicetree.cb @@ -13,14 +13,10 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/amd8131 # the on/off keyword is mandatory device pci 0.0 on - chip drivers/pci/onboard - device pci 9.0 on end # Broadcom 5704 - device pci 9.1 on end - end - chip drivers/pci/onboard - device pci a.0 on end # Adaptic - device pci a.1 on end - end + device pci 9.0 on end # Broadcom 5704 + device pci 9.1 on end + device pci a.0 on end # Adaptic + device pci a.1 on end end device pci 0.1 on end device pci 1.0 on end @@ -34,12 +30,8 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 off end device pci 1.0 off end - chip drivers/pci/onboard - device pci 5.0 on end # SiI - end - chip drivers/pci/onboard - device pci 6.0 on end - end + device pci 5.0 on end # SiI + device pci 6.0 on end end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s2882/Config.lb b/src/mainboard/tyan/s2882/Config.lb index e92ea84948..266733154e 100644 --- a/src/mainboard/tyan/s2882/Config.lb +++ b/src/mainboard/tyan/s2882/Config.lb @@ -114,14 +114,10 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/amd8131 # the on/off keyword is mandatory device pci 0.0 on - chip drivers/pci/onboard - device pci 6.0 on end # adaptec - device pci 6.1 on end - end - chip drivers/pci/onboard - device pci 9.0 on end # broadcom 5704 - device pci 9.1 on end - end + device pci 6.0 on end # adaptec + device pci 6.1 on end + device pci 9.0 on end # broadcom 5704 + device pci 9.1 on end end device pci 0.1 on end device pci 1.0 on end @@ -135,16 +131,11 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 off end device pci 1.0 off end - chip drivers/pci/onboard - device pci 5.0 on end - end + device pci 5.0 on end # chip drivers/ati/ragexl - chip drivers/pci/onboard - device pci 6.0 on end - end - chip drivers/pci/onboard - device pci 8.0 on end #intel 10/100 - end + device pci 6.0 on end + # end + device pci 8.0 on end #intel 10/100 end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s2882/devicetree.cb b/src/mainboard/tyan/s2882/devicetree.cb index d4200d158e..d563232b2d 100644 --- a/src/mainboard/tyan/s2882/devicetree.cb +++ b/src/mainboard/tyan/s2882/devicetree.cb @@ -12,14 +12,10 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/amd8131 # the on/off keyword is mandatory device pci 0.0 on - chip drivers/pci/onboard - device pci 6.0 on end # adaptec - device pci 6.1 on end - end - chip drivers/pci/onboard - device pci 9.0 on end # broadcom 5704 - device pci 9.1 on end - end + device pci 6.0 on end # adaptec + device pci 6.1 on end + device pci 9.0 on end # broadcom 5704 + device pci 9.1 on end end device pci 0.1 on end device pci 1.0 on end @@ -33,16 +29,11 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 off end device pci 1.0 off end - chip drivers/pci/onboard - device pci 5.0 on end - end + device pci 5.0 on end # chip drivers/ati/ragexl - chip drivers/pci/onboard - device pci 6.0 on end - end - chip drivers/pci/onboard - device pci 8.0 on end #intel 10/100 - end + device pci 6.0 on end + # end + device pci 8.0 on end #intel 10/100 end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s2885/Config.lb b/src/mainboard/tyan/s2885/Config.lb index 012b09774b..26389a18ce 100644 --- a/src/mainboard/tyan/s2885/Config.lb +++ b/src/mainboard/tyan/s2885/Config.lb @@ -121,9 +121,7 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/amd8131 # the on/off keyword is mandatory device pci 0.0 on - chip drivers/pci/onboard - device pci 9.0 on end # broadcom 5703 - end + device pci 9.0 on end # broadcom 5703 end device pci 0.1 on end device pci 1.0 on end @@ -137,9 +135,7 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 off end device pci 1.0 off end - chip drivers/pci/onboard - device pci b.0 on end # SiI 3114 - end + device pci b.0 on end # SiI 3114 end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s2885/devicetree.cb b/src/mainboard/tyan/s2885/devicetree.cb index 8a981500f1..f8dc2215d9 100644 --- a/src/mainboard/tyan/s2885/devicetree.cb +++ b/src/mainboard/tyan/s2885/devicetree.cb @@ -19,9 +19,7 @@ chip northbridge/amd/amdk8/root_complex chip southbridge/amd/amd8131 # the on/off keyword is mandatory device pci 0.0 on - chip drivers/pci/onboard - device pci 9.0 on end # broadcom 5703 - end + device pci 9.0 on end # broadcom 5703 end device pci 0.1 on end device pci 1.0 on end @@ -35,9 +33,7 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 off end device pci 1.0 off end - chip drivers/pci/onboard - device pci b.0 on end # SiI 3114 - end + device pci b.0 on end # SiI 3114 end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s2891/devicetree.cb b/src/mainboard/tyan/s2891/devicetree.cb index cd349da548..d7b980147f 100644 --- a/src/mainboard/tyan/s2891/devicetree.cb +++ b/src/mainboard/tyan/s2891/devicetree.cb @@ -104,9 +104,7 @@ chip northbridge/amd/amdk8/root_complex device pci 8.0 on end # SATA 0 device pci 9.0 on # PCI # chip drivers/ati/ragexl - chip drivers/pci/onboard - device pci 7.0 on end - end + device pci 7.0 on end end device pci a.0 off end # NIC device pci b.0 off end # PCI E 3 @@ -127,10 +125,8 @@ chip northbridge/amd/amdk8/root_complex device pci 0.0 on end device pci 0.1 on end device pci 1.0 on - chip drivers/pci/onboard - device pci 9.0 on end - device pci 9.1 on end - end + device pci 9.0 on end + device pci 9.1 on end end device pci 1.1 on end end diff --git a/src/mainboard/tyan/s2892/devicetree.cb b/src/mainboard/tyan/s2892/devicetree.cb index 518dae6a90..a64c5470ee 100644 --- a/src/mainboard/tyan/s2892/devicetree.cb +++ b/src/mainboard/tyan/s2892/devicetree.cb @@ -105,12 +105,9 @@ chip northbridge/amd/amdk8/root_complex device pci 8.0 on end # SATA 0 device pci 9.0 on # PCI # chip drivers/ati/ragexl - chip drivers/pci/onboard - device pci 6.0 on end - end - chip drivers/pci/onboard - device pci 8.0 on end - end + device pci 6.0 on end + # end + device pci 8.0 on end end device pci a.0 off end # NIC device pci b.0 off end # PCI E 3 @@ -131,10 +128,8 @@ chip northbridge/amd/amdk8/root_complex device pci 0.0 on end device pci 0.1 on end device pci 1.0 on - chip drivers/pci/onboard - device pci 9.0 on end # broadcom 5704 - device pci 9.1 on end - end + device pci 9.0 on end # broadcom 5704 + device pci 9.1 on end end device pci 1.1 on end end diff --git a/src/mainboard/tyan/s2895/devicetree.cb b/src/mainboard/tyan/s2895/devicetree.cb index 6e4c2a63a1..d031947d2d 100644 --- a/src/mainboard/tyan/s2895/devicetree.cb +++ b/src/mainboard/tyan/s2895/devicetree.cb @@ -111,10 +111,8 @@ chip northbridge/amd/amdk8/root_complex device pci 0.0 on end device pci 0.1 on end device pci 1.0 on - chip drivers/pci/onboard - device pci 6.0 on end # lsi scsi - device pci 6.1 on end - end + device pci 6.0 on end # lsi scsi + device pci 6.1 on end end device pci 1.1 on end end diff --git a/src/mainboard/tyan/s2912_fam10/Config.lb b/src/mainboard/tyan/s2912_fam10/Config.lb index 49ae429bf5..f3765f27f7 100644 --- a/src/mainboard/tyan/s2912_fam10/Config.lb +++ b/src/mainboard/tyan/s2912_fam10/Config.lb @@ -279,9 +279,7 @@ chip northbridge/amd/amdfam10/root_complex device pci 5.1 on end # SATA 1 device pci 5.2 on end # SATA 2 device pci 6.0 on - chip drivers/pci/onboard - device pci 4.0 on end - end + device pci 4.0 on end end # PCI device pci 6.1 off end # AZA device pci 8.0 on end # NIC diff --git a/src/mainboard/tyan/s2912_fam10/devicetree.cb b/src/mainboard/tyan/s2912_fam10/devicetree.cb index 4bce6b3e89..a6a012a839 100644 --- a/src/mainboard/tyan/s2912_fam10/devicetree.cb +++ b/src/mainboard/tyan/s2912_fam10/devicetree.cb @@ -112,9 +112,7 @@ chip northbridge/amd/amdfam10/root_complex device pci 5.1 on end # SATA 1 device pci 5.2 on end # SATA 2 device pci 6.0 on - chip drivers/pci/onboard - device pci 4.0 on end - end + device pci 4.0 on end end # PCI device pci 6.1 off end # AZA device pci 8.0 on end # NIC diff --git a/src/mainboard/tyan/s4880/Config.lb b/src/mainboard/tyan/s4880/Config.lb index 68efa3bba8..5e1aaf5130 100644 --- a/src/mainboard/tyan/s4880/Config.lb +++ b/src/mainboard/tyan/s4880/Config.lb @@ -116,10 +116,8 @@ chip northbridge/amd/amdk8/root_complex # device pci 4.1 on end # register "fw_address" = "0xfff8c000" # end - chip drivers/pci/onboard - device pci 9.0 on end - device pci 9.1 on end - end + device pci 9.0 on end + device pci 9.1 on end end device pci 0.1 on end device pci 1.0 on end @@ -133,9 +131,7 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 off end device pci 1.0 off end - chip drivers/pci/onboard - device pci 6.0 on end - end + device pci 6.0 on end end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s4880/devicetree.cb b/src/mainboard/tyan/s4880/devicetree.cb index d1e424b697..4a08e45d1b 100644 --- a/src/mainboard/tyan/s4880/devicetree.cb +++ b/src/mainboard/tyan/s4880/devicetree.cb @@ -19,10 +19,8 @@ chip northbridge/amd/amdk8/root_complex # device pci 4.1 on end # register "fw_address" = "0xfff8c000" # end - chip drivers/pci/onboard - device pci 9.0 on end - device pci 9.1 on end - end + device pci 9.0 on end + device pci 9.1 on end end device pci 0.1 on end device pci 1.0 on end @@ -36,9 +34,7 @@ chip northbridge/amd/amdk8/root_complex device pci 0.1 on end device pci 0.2 off end device pci 1.0 off end - chip drivers/pci/onboard - device pci 6.0 on end - end + device pci 6.0 on end end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s4882/Config.lb b/src/mainboard/tyan/s4882/Config.lb index 48b2597451..bbb94f2116 100644 --- a/src/mainboard/tyan/s4882/Config.lb +++ b/src/mainboard/tyan/s4882/Config.lb @@ -114,10 +114,8 @@ chip northbridge/amd/amdk8/root_complex # device pci 4.1 on end # register "fw_address" = "0xfff8c000" # end - chip drivers/pci/onboard - device pci 9.0 on end #Broadcom - device pci 9.1 on end - end + device pci 9.0 on end #Broadcom + device pci 9.1 on end end device pci 0.1 on end device pci 1.0 on end @@ -132,12 +130,9 @@ chip northbridge/amd/amdk8/root_complex device pci 0.2 off end device pci 1.0 off end #chip drivers/ati/ragexl - chip drivers/pci/onboard - device pci 6.0 on end - end - chip drivers/pci/onboard - device pci 5.0 on end #SiI - end + device pci 6.0 on end + #end + device pci 5.0 on end #SiI end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/tyan/s4882/devicetree.cb b/src/mainboard/tyan/s4882/devicetree.cb index d61865cdd5..d2e5bbcf90 100644 --- a/src/mainboard/tyan/s4882/devicetree.cb +++ b/src/mainboard/tyan/s4882/devicetree.cb @@ -17,10 +17,8 @@ chip northbridge/amd/amdk8/root_complex # device pci 4.1 on end # register "fw_address" = "0xfff8c000" # end - chip drivers/pci/onboard - device pci 9.0 on end #Broadcom - device pci 9.1 on end - end + device pci 9.0 on end #Broadcom + device pci 9.1 on end end device pci 0.1 on end device pci 1.0 on end @@ -35,12 +33,9 @@ chip northbridge/amd/amdk8/root_complex device pci 0.2 off end device pci 1.0 off end #chip drivers/ati/ragexl - chip drivers/pci/onboard - device pci 6.0 on end - end - chip drivers/pci/onboard - device pci 5.0 on end #SiI - end + device pci 6.0 on end + #end + device pci 5.0 on end #SiI end device pci 1.0 on chip superio/winbond/w83627hf diff --git a/src/mainboard/via/epia/Config.lb b/src/mainboard/via/epia/Config.lb index fdde8b3116..c75c21e060 100644 --- a/src/mainboard/via/epia/Config.lb +++ b/src/mainboard/via/epia/Config.lb @@ -96,10 +96,7 @@ chip northbridge/via/vt8601 device pci_domain 0 on device pci 0.0 on end # Northbridge # device pci 0.1 on # AGP bridge - # chip drivers/pci/onboard # Integrated VGA - # device pci 0.0 on end - # register "rom_adress" = "0xfff80000" - # end + # device pci 0.0 on end # Integrated VGA # end chip southbridge/via/vt8231 register "enable_native_ide" = "0" diff --git a/src/mainboard/via/epia/devicetree.cb b/src/mainboard/via/epia/devicetree.cb index b75ee5881a..b97f4f27bf 100644 --- a/src/mainboard/via/epia/devicetree.cb +++ b/src/mainboard/via/epia/devicetree.cb @@ -2,10 +2,7 @@ chip northbridge/via/vt8601 device pci_domain 0 on device pci 0.0 on end # Northbridge # device pci 0.1 on # AGP bridge - # chip drivers/pci/onboard # Integrated VGA - # device pci 0.0 on end - # register "rom_adress" = "0xfff80000" - # end + # device pci 0.0 on end # Integrated VGA # end chip southbridge/via/vt8231 register "enable_native_ide" = "0" diff --git a/src/mainboard/via/vt8454c/Config.lb b/src/mainboard/via/vt8454c/Config.lb index 3dd107ac52..6faa33c3b2 100644 --- a/src/mainboard/via/vt8454c/Config.lb +++ b/src/mainboard/via/vt8454c/Config.lb @@ -121,9 +121,7 @@ chip northbridge/via/cx700 device pci 0.4 on end # Power Management device pci 0.7 on end # V-Link Controller device pci 1.0 on # PCI Bridge - chip drivers/pci/onboard - device pci 0.0 on end - end # Onboard Video + device pci 0.0 on end # Onboard Video end # PCI Bridge device pci f.0 on end # IDE/SATA #device pci f.1 on end # IDE diff --git a/src/mainboard/via/vt8454c/devicetree.cb b/src/mainboard/via/vt8454c/devicetree.cb index 3ef59b52e1..d308dbb773 100644 --- a/src/mainboard/via/vt8454c/devicetree.cb +++ b/src/mainboard/via/vt8454c/devicetree.cb @@ -12,9 +12,7 @@ chip northbridge/via/cx700 device pci 0.4 on end # Power Management device pci 0.7 on end # V-Link Controller device pci 1.0 on # PCI Bridge - chip drivers/pci/onboard - device pci 0.0 on end - end # Onboard Video + device pci 0.0 on end # Onboard Video end # PCI Bridge device pci f.0 on end # IDE/SATA #device pci f.1 on end # IDE diff --git a/src/northbridge/via/cn400/vga.c b/src/northbridge/via/cn400/vga.c index 6c61f3de5d..5a58d17550 100644 --- a/src/northbridge/via/cn400/vga.c +++ b/src/northbridge/via/cn400/vga.c @@ -121,15 +121,8 @@ static void vga_init(device_t dev) #endif } -static void vga_read_resources(device_t dev) -{ - dev->rom_address = 0xfff80000; - dev->on_mainboard = 1; - pci_dev_read_resources(dev); -} - static const struct device_operations vga_operations = { - .read_resources = vga_read_resources, + .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = vga_init, diff --git a/src/northbridge/via/cn700/vga.c b/src/northbridge/via/cn700/vga.c index 3c8fb61ce6..e4f9d93b6f 100644 --- a/src/northbridge/via/cn700/vga.c +++ b/src/northbridge/via/cn700/vga.c @@ -101,15 +101,8 @@ static void vga_init(device_t dev) memset(0xf0000, 0, 0x10000); } -static void vga_read_resources(device_t dev) -{ - dev->rom_address = 0xfff80000; - dev->on_mainboard = 1; - pci_dev_read_resources(dev); -} - static const struct device_operations vga_operations = { - .read_resources = vga_read_resources, + .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = vga_init, diff --git a/src/northbridge/via/cx700/cx700_vga.c b/src/northbridge/via/cx700/cx700_vga.c index 96bb769e20..bcb7d9e8a9 100644 --- a/src/northbridge/via/cx700/cx700_vga.c +++ b/src/northbridge/via/cx700/cx700_vga.c @@ -97,15 +97,8 @@ static void vga_init(device_t dev) outb(reg8, SR_DATA); } -static void vga_read_resources(device_t dev) -{ - dev->rom_address = 0xfff80000; - dev->on_mainboard = 1; - pci_dev_read_resources(dev); -} - static struct device_operations vga_operations = { - .read_resources = vga_read_resources, + .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = vga_init, diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c index d384a9809c..15910fe74d 100644 --- a/src/northbridge/via/vt8623/northbridge.c +++ b/src/northbridge/via/vt8623/northbridge.c @@ -124,9 +124,6 @@ static void vga_init(device_t dev) #if 0 /* code to make vga init go through the emulator - as of yet this does not workfor the epia-m */ - dev->on_mainboard=1; - dev->rom_address = (void *)0xfffc0000; - pci_dev_init(dev); call_bios_interrupt(0x10,0x4f1f,0x8003,1,0); @@ -167,17 +164,8 @@ static void vga_init(device_t dev) #endif } -static void vga_read_resources(device_t dev) -{ - - dev->rom_address = (void *)0xfffc0000; - dev->on_mainboard=1; - pci_dev_read_resources(dev); - -} - static struct device_operations vga_operations = { - .read_resources = vga_read_resources, + .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = vga_init, diff --git a/src/northbridge/via/vx800/vga.c b/src/northbridge/via/vx800/vga.c index a3bf81bd08..732963de46 100644 --- a/src/northbridge/via/vx800/vga.c +++ b/src/northbridge/via/vx800/vga.c @@ -126,15 +126,8 @@ static void vga_init(device_t dev) } -static void vga_read_resources(device_t dev) -{ - dev->rom_address = (void *)(0xffffffff - CONFIG_ROM_SIZE + 1); - dev->on_mainboard = 1; - pci_dev_read_resources(dev); -} - static struct device_operations vga_operations = { - .read_resources = vga_read_resources, + .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = vga_init, diff --git a/src/southbridge/nvidia/ck804/chip.h b/src/southbridge/nvidia/ck804/chip.h index ddbe6be981..479f3ebbf4 100644 --- a/src/southbridge/nvidia/ck804/chip.h +++ b/src/southbridge/nvidia/ck804/chip.h @@ -7,8 +7,6 @@ struct southbridge_nvidia_ck804_config { unsigned int ide1_enable : 1; unsigned int sata0_enable : 1; unsigned int sata1_enable : 1; - unsigned long nic_rom_address; - unsigned long raid_rom_address; unsigned int mac_eeprom_smbus; unsigned int mac_eeprom_addr; }; diff --git a/src/southbridge/nvidia/ck804/ck804.c b/src/southbridge/nvidia/ck804/ck804.c index 4adf819304..2c0d5a2067 100644 --- a/src/southbridge/nvidia/ck804/ck804.c +++ b/src/southbridge/nvidia/ck804/ck804.c @@ -77,12 +77,10 @@ void ck804_enable(device_t dev) case PCI_DEVICE_ID_NVIDIA_CK804_NIC: devfn -= (9 << 3); index = 10; - dev->rom_address = conf->nic_rom_address; break; case PCI_DEVICE_ID_NVIDIA_CK804_NIC_BRIDGE: devfn -= (9 << 3); index = 10; - dev->rom_address = conf->nic_rom_address; break; case PCI_DEVICE_ID_NVIDIA_CK804_ACI: devfn -= (3 << 3); @@ -95,7 +93,6 @@ void ck804_enable(device_t dev) case PCI_DEVICE_ID_NVIDIA_CK804_IDE: devfn -= (5 << 3); index = 14; - dev->rom_address = conf->raid_rom_address; break; case PCI_DEVICE_ID_NVIDIA_CK804_SATA0: devfn -= (6 << 3); |