diff options
author | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-26 19:43:08 +0100 |
---|---|---|
committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-27 20:48:55 +0000 |
commit | ce04a42db9192aece8fc2d27a91fa498bcc2a698 (patch) | |
tree | e9946b3d3956ccf809ebb9745dbee530d92ddb58 | |
parent | 0f34054964a55707af963e86675f6341f506fd47 (diff) |
docs/mb/supermicro/x11ssm-f: Update board documentation
- Drop vanished issue on PCIe warning
- Drop TODO section, since the TODOs are done
- Document the jumper J6, that was not documented by the vendor. Its
function has been determined by dissecting a dead board.
- The flash is not socketed anymore. Drop that note and compress the
whole paragraph. Also add a note about flashing via the BMC web
interface.
Change-Id: I2b5a08a6b6d80717621d6a30f31829fe4b84891a
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48125
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
-rw-r--r-- | Documentation/mainboard/supermicro/x11-lga1151-series/x11ssm-f/x11ssm-f.md | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssm-f/x11ssm-f.md b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssm-f/x11ssm-f.md index 5213bce6de..9f18b79cd8 100644 --- a/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssm-f/x11ssm-f.md +++ b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssm-f/x11ssm-f.md @@ -4,11 +4,11 @@ This section details how to run coreboot on the [Supermicro X11SSM-F]. ## Flashing coreboot -The board can be flashed externally. FTDI FT2232H and FT232H based programmers worked. +The board can be flashed externally. FTDI FT2232H and FT232H based programmers worked. For this, +one needs to add a diode between VCC and the flash chip. The flash IC [MX25L12873F] can be found +near PCH PCIe Slot 4. -The flash IC [MX25L12873F] can be found near PCH PCIe Slot 4. It is socketed on retail boards. - -For doing ISP (In-System-Programming) one needs to add a diode between VCC and the flash chip. +Flashing is also possible through the BMC web interface, when a valid license was entered. ## BMC (IPMI) @@ -16,6 +16,10 @@ This board has an ASPEED [AST2400], which has BMC/[IPMI] functionality. The BMC 32 MiB SOIC-16 chip in the corner of the mainboard near the PCH PCIe Slot 4. This chip is a [MX25L25635F]. +## Disabling LAN firmware + +To disable the proprietary LAN firmware, the undocumented jumper J6 can be set to 2-3. + ## Tested and working - GRUB2 payload with Debian testing and kernel 5.2 @@ -32,14 +36,9 @@ This board has an ASPEED [AST2400], which has BMC/[IPMI] functionality. The BMC ## Known issues - See general issue section -- "only partially covers this bridge" info from Linux kernel (what does that mean?) - LNXTHERM missing - S3 resume not working -## ToDo - -- Fix TODOs mentioned in code - ## Technology ```eval_rst |