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authorDmitry Ponamorev <dponamorev@gmail.com>2021-09-15 03:19:15 -0700
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-12-15 12:10:02 +0000
commitccc27d2ccad2e016262923ee241b1569a6085118 (patch)
tree8e60c02d1e2be2c56a1de117a6049cea9d16eb6e
parentadd2e930505be3470092774f595cdb8b3ff61ef2 (diff)
soc/intel/baytrail,denverton_ns: Call setup_lapic()
A custom board with soc/intel/denverton_ns does not respond to the keyboard and does not boot from the sata/USB disks. Last post code 0x7b and the last line that is displayed at log from SeaBIOS is: All threads complete. The issue is gone when adding setup_lapic() call to configure EXTINT delivery of i8259 originated interrupts for the LAPIC. Replicate call from other soc/ and make the call for both BSP and AP CPUs. Similar change was done for soc/intel/braswell in commit b4f57bb3cac3ab29b9fa9c526ad4358faffb77a1. Signed-off-by: Dmitry Ponamorev <dponamorev@gmail.com> Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Change-Id: Iafbfb733d0be546e0e2fba937fd1d262785aa54d Reviewed-on: https://review.coreboot.org/c/coreboot/+/57668 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--src/soc/intel/baytrail/cpu.c3
-rw-r--r--src/soc/intel/denverton_ns/cpu.c4
2 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/cpu.c b/src/soc/intel/baytrail/cpu.c
index 1dbc3d7751..eb24f7bf8c 100644
--- a/src/soc/intel/baytrail/cpu.c
+++ b/src/soc/intel/baytrail/cpu.c
@@ -36,6 +36,9 @@ static void soc_core_init(struct device *cpu)
{
printk(BIOS_DEBUG, "Init BayTrail core.\n");
+ /* Enable the local CPU apics */
+ setup_lapic();
+
/*
* The turbo disable bit is actually scoped at building block level -- not package.
* For non-BSP cores that are within a building block, enable turbo. The cores within
diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c
index 126a1c651f..ef1140b76a 100644
--- a/src/soc/intel/denverton_ns/cpu.c
+++ b/src/soc/intel/denverton_ns/cpu.c
@@ -3,6 +3,7 @@
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/x86/cr.h>
+#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
@@ -91,6 +92,9 @@ static void denverton_core_init(struct device *cpu)
/* Enable Turbo */
enable_turbo();
+ /* Enable the local CPU apics */
+ setup_lapic();
+
/* Enable speed step. Always ON.*/
msr = rdmsr(IA32_MISC_ENABLE);
msr.lo |= SPEED_STEP_ENABLE_BIT;