diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2022-07-16 12:37:38 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-18 15:38:14 +0000 |
| commit | c7c746c3b2cab52a80719bba39cbdc9ea4babb35 (patch) | |
| tree | 4cd74dcf44391337949b254f49040828b002b35f | |
| parent | 10cd06b1c75e4bc69a1de7e3a70c28ff2e5195fc (diff) | |
soc/intel/meteorlake: Account for GSPI2 everywhere
Commit e54a8fd43247d767f16a37f3e3150b2915d809bc (soc/intel/meteorlake:
Add entry for GSPI2 device) added an entry for the GSPI2 device in the
devicetree, but did not add any other entries. Ensure that the rest of
the code is aware of the GSPI2 device to avoid any problems.
Change-Id: Ib59bd289751bd96402c4adc61ffbee3bebe0edb0
Found-by: Coverity CID 1490681
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65916
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
| -rw-r--r-- | src/soc/intel/meteorlake/chip.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/fsp_params.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/gspi.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/include/soc/pci_devs.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/spi.c | 2 |
5 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/chip.c b/src/soc/intel/meteorlake/chip.c index 8139b5b3af..5b62c069da 100644 --- a/src/soc/intel/meteorlake/chip.c +++ b/src/soc/intel/meteorlake/chip.c @@ -101,6 +101,7 @@ const char *soc_acpi_name(const struct device *dev) case PCI_DEVFN_UART2: return "UAR2"; case PCI_DEVFN_GSPI0: return "SPI0"; case PCI_DEVFN_GSPI1: return "SPI1"; + case PCI_DEVFN_GSPI2: return "SPI2"; /* Keeping ACPI device name coherent with ec.asl */ case PCI_DEVFN_ESPI: return "LPCB"; case PCI_DEVFN_HDA: return "HDAS"; diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index e030948ff8..f77182a344 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -59,6 +59,7 @@ static const pci_devfn_t i2c_dev[] = { static const pci_devfn_t gspi_dev[] = { PCI_DEVFN_GSPI0, PCI_DEVFN_GSPI1, + PCI_DEVFN_GSPI2, }; static const pci_devfn_t uart_dev[] = { diff --git a/src/soc/intel/meteorlake/gspi.c b/src/soc/intel/meteorlake/gspi.c index 2a34ab6fdf..387d3e3949 100644 --- a/src/soc/intel/meteorlake/gspi.c +++ b/src/soc/intel/meteorlake/gspi.c @@ -10,6 +10,8 @@ int gspi_soc_bus_to_devfn(unsigned int gspi_bus) return PCI_DEVFN_GSPI0; case 1: return PCI_DEVFN_GSPI1; + case 2: + return PCI_DEVFN_GSPI2; } return -1; } diff --git a/src/soc/intel/meteorlake/include/soc/pci_devs.h b/src/soc/intel/meteorlake/include/soc/pci_devs.h index b139da4f4f..701faf9d62 100644 --- a/src/soc/intel/meteorlake/include/soc/pci_devs.h +++ b/src/soc/intel/meteorlake/include/soc/pci_devs.h @@ -84,8 +84,10 @@ #define PCI_DEV_SLOT_ISH 0x12 #define PCI_DEVFN_ISH _PCI_DEVFN(ISH, 0) +#define PCI_DEVFN_GSPI2 _PCI_DEVFN(ISH, 6) #define PCI_DEVFN_UFS _PCI_DEVFN(ISH, 7) #define PCI_DEV_ISH _PCI_DEV(ISH, 0) +#define PCI_DEV_GSPI2 _PCI_DEV(ISH, 6) #define PCI_DEV_UFS _PCI_DEV(ISH, 7) #define PCI_DEV_SLOT_IOE 0x13 diff --git a/src/soc/intel/meteorlake/spi.c b/src/soc/intel/meteorlake/spi.c index f2e340087b..a31dc4cab9 100644 --- a/src/soc/intel/meteorlake/spi.c +++ b/src/soc/intel/meteorlake/spi.c @@ -15,6 +15,8 @@ int spi_soc_devfn_to_bus(unsigned int devfn) return 1; case PCI_DEVFN_GSPI1: return 2; + case PCI_DEVFN_GSPI2: + return 3; } return -1; } |