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authorFelix Held <felix-coreboot@felixheld.de>2023-06-01 21:52:05 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-06-07 00:25:57 +0000
commitc79c64be95822070ad1a74056356ffe65530df1b (patch)
tree8cc5b20743c39c654fba829f42f94327aca836e3
parente4500c653057759e219418a104c2f2224480e0de (diff)
soc/amd/picasso/acpi: use ROOT_BRIDGE macro
Instead of having the different static parts of the PCI0 device in northbridge.asl and sb_pci0_fch.asl, instantiate the static parts of the PCI0 device via the ROOT_BRIDGE macro in soc.asl. TEST=Both Ubuntu 2022.4 and Windows 10 still boot successfully and don't show any new ACPI-related error. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I2587d8bb270dc3edce9dfa570a5018116fc9187f Reviewed-on: https://review.coreboot.org/c/coreboot/+/75569 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
-rw-r--r--src/soc/amd/picasso/acpi/northbridge.asl4
-rw-r--r--src/soc/amd/picasso/acpi/sb_pci0_fch.asl15
-rw-r--r--src/soc/amd/picasso/acpi/soc.asl6
3 files changed, 5 insertions, 20 deletions
diff --git a/src/soc/amd/picasso/acpi/northbridge.asl b/src/soc/amd/picasso/acpi/northbridge.asl
index 2f73ae4384..5cbe950235 100644
--- a/src/soc/amd/picasso/acpi/northbridge.asl
+++ b/src/soc/amd/picasso/acpi/northbridge.asl
@@ -1,9 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* Note: Only need HID on Primary Bus */
-Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
-Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
-
/* Describe the Northbridge devices */
Method(_STA, 0, NotSerialized)
diff --git a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl
index 898914cddf..ead676dde0 100644
--- a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl
+++ b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl
@@ -3,21 +3,6 @@
/* System Bus */
/* _SB.PCI0 */
-/* Operating System Capabilities Method */
-Method(_OSC,4)
-{
- /* Check for proper PCI/PCIe UUID */
- If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))
- {
- /* Let OS control everything */
- Return (Arg3)
- } Else {
- CreateDWordField(Arg3,0,CDW1)
- CDW1 |= 4 // Unrecognized UUID
- Return (Arg3)
- }
-}
-
/* 0:14.3 - LPC */
#include <soc/amd/common/acpi/lpc.asl>
#include <soc/amd/common/acpi/platform.asl>
diff --git a/src/soc/amd/picasso/acpi/soc.asl b/src/soc/amd/picasso/acpi/soc.asl
index f44f873446..82c2766e33 100644
--- a/src/soc/amd/picasso/acpi/soc.asl
+++ b/src/soc/amd/picasso/acpi/soc.asl
@@ -1,6 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-Device(PCI0) {
+#include <soc/amd/common/acpi/pci_root.asl>
+
+ROOT_BRIDGE(PCI0)
+
+Scope(PCI0) {
/* Describe the AMD Northbridge */
#include "northbridge.asl"