diff options
| author | Wisley Chen <wisley.chen@quanta.corp-partner.google.com> | 2022-03-03 17:23:05 +0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-03-07 17:07:21 +0000 |
| commit | c5e1a0268960cc1b9362a8344b65a47ae8be94f8 (patch) | |
| tree | 50bc27b030afdc55f7e8e05464a84e0f4f8ec20b | |
| parent | 20ee22c2ccf344b66f91b5c2e739f2d4c1dcfd8f (diff) | |
mb/google/brya/var/redrix{4es}: Re-enable USB2 port for Bluetooth
BT didn't work due to commit 03c0853f4d58c73.
Commit 03c0853f4d58c73 accidentally set the Bluetooth USB2 port
to "empty", therefore re-enable USB2 port 9.
BUG=b:217238553, b:222238381
TEST=build and verfied BT work/suspend successfully
Change-Id: Ie94ef847fc130019f1e06983fc5039f1f564cd3a
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62564
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
| -rw-r--r-- | src/mainboard/google/brya/variants/redrix/overridetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/redrix4es/overridetree.cb | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb index 2bf3fc23be..435f47a58f 100644 --- a/src/mainboard/google/brya/variants/redrix/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb @@ -43,7 +43,6 @@ chip soc/intel/alderlake register "usb2_ports[1]" = "USB2_PORT_EMPTY" register "usb2_ports[5]" = "USB2_PORT_EMPTY" - register "usb2_ports[9]" = "USB2_PORT_EMPTY" register "tcss_ports[1]" = "TCSS_PORT_EMPTY" # Intel Common SoC Config diff --git a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb index afffab5333..2a08af4e3b 100644 --- a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb @@ -43,7 +43,6 @@ chip soc/intel/alderlake register "usb2_ports[1]" = "USB2_PORT_EMPTY" register "usb2_ports[5]" = "USB2_PORT_EMPTY" - register "usb2_ports[9]" = "USB2_PORT_EMPTY" register "tcss_ports[1]" = "TCSS_PORT_EMPTY" # Intel Common SoC Config |