diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-08-26 18:18:36 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-09-11 22:33:28 +0000 |
| commit | c33f6e047fd2463943a2856a966cfde042e36ea3 (patch) | |
| tree | f03883a5b9f42872d6ae641e2829af5e7f3ec457 | |
| parent | 92c4bc19e93e2036f826c03a0cd32855601d0381 (diff) | |
mb/ibase/mb899: Use 'PNP_IDX_*' macros instead of magic number
Change-Id: I1e543f8ff701fa20eaaee601ef54f0b056e61909
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44832
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
| -rw-r--r-- | src/mainboard/ibase/mb899/early_init.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/mainboard/ibase/mb899/early_init.c b/src/mainboard/ibase/mb899/early_init.c index 88a569993f..1799f9a2df 100644 --- a/src/mainboard/ibase/mb899/early_init.c +++ b/src/mainboard/ibase/mb899/early_init.c @@ -41,7 +41,7 @@ void bootblock_mainboard_early_init(void) pnp_set_enable(dev, 0); pnp_set_iobase(dev, PNP_IDX_IO0, 0x2f8); pnp_set_irq(dev, PNP_IDX_IRQ0, 3); - // pnp_write_config(dev, 0xf1, 4); // IRMODE0 + // pnp_write_config(dev, PNP_IDX_MSC1, 4); // IRMODE0 pnp_set_enable(dev, 1); dev = PNP_DEV(0x4e, W83627EHG_KBC); // Keyboard @@ -49,7 +49,7 @@ void bootblock_mainboard_early_init(void) pnp_set_enable(dev, 0); pnp_set_iobase(dev, PNP_IDX_IO0, 0x60); pnp_set_iobase(dev, PNP_IDX_IO1, 0x64); - //pnp_write_config(dev, 0xf0, 0x82); + //pnp_write_config(dev, PNP_IDX_MSC0, 0x82); pnp_set_enable(dev, 1); dev = PNP_DEV(0x4e, W83627EHG_GPIO2); @@ -59,9 +59,10 @@ void bootblock_mainboard_early_init(void) dev = PNP_DEV(0x4e, W83627EHG_GPIO3); pnp_set_logical_device(dev); pnp_set_enable(dev, 0); - pnp_write_config(dev, 0xf0, 0xfb); // GPIO bit 2 is output - pnp_write_config(dev, 0xf1, 0x00); // GPIO bit 2 is 0 - pnp_write_config(dev, 0x30, 0x03); // Enable GPIO3+4. pnp_set_enable is not sufficient + pnp_write_config(dev, PNP_IDX_MSC0, 0xfb); // GPIO bit 2 is output + pnp_write_config(dev, PNP_IDX_MSC1, 0x00); // GPIO bit 2 is 0 + // Enable GPIO3+4. pnp_set_enable is not sufficient + pnp_write_config(dev, PNP_IDX_EN, 0x03); dev = PNP_DEV(0x4e, W83627EHG_FDC); pnp_set_logical_device(dev); |