diff options
author | Subrata Banik <subratabanik@google.com> | 2021-12-25 21:24:30 +0530 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2021-12-26 19:35:43 +0000 |
commit | c1e46bde507f3d026d1fbaeef1a0fd30bff84d65 (patch) | |
tree | c6c21a75a8921a1e0acf9ed0216adf40e4208489 | |
parent | 9758ef9c84a3ecf8a7880532b796280eaef0e215 (diff) |
mb/google/brya: Move PCH selection to variant config
This patch ensures ADL-P PCH can get selected by mainboard
variants to accommodate mainboards with ADL-N PCH in future.
TEST=Able to build and boot brya without any Kconfig change.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ifbcd1cd7f8ecafee22d50c3f3f20decc4cc62797
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60378
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/mainboard/google/brya/Kconfig | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 02ca38fd11..0e7651fee8 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -2,6 +2,7 @@ config BOARD_GOOGLE_BASEBOARD_BRYA def_bool n select CHROMEOS_DRAM_PART_NUMBER_IN_CBI if CHROMEOS select HAVE_SPD_IN_CBFS + select SOC_INTEL_ALDERLAKE_PCH_P select SYSTEM_TYPE_LAPTOP config BOARD_GOOGLE_BASEBOARD_BRASK @@ -11,6 +12,7 @@ config BOARD_GOOGLE_BASEBOARD_BRASK select RT8168_GET_MAC_FROM_VPD select RT8168_SET_LED_MODE select RT8168_GEN_ACPI_POWER_RESOURCE + select SOC_INTEL_ALDERLAKE_PCH_P if BOARD_GOOGLE_BASEBOARD_BRYA || BOARD_GOOGLE_BASEBOARD_BRASK @@ -48,7 +50,6 @@ config BOARD_GOOGLE_BRYA_COMMON select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_I2C_TPM_CR50 select MAINBOARD_HAS_TPM2 - select SOC_INTEL_ALDERLAKE_PCH_P select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3 select SOC_INTEL_CSE_LITE_SKU |