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authorMatt DeVillier <matt.devillier@gmail.com>2023-02-23 19:24:38 -0600
committerMatt DeVillier <matt.devillier@gmail.com>2023-04-10 15:13:52 +0000
commitb4bf865359fe084b46021fadfd0867a3649b92bf (patch)
tree7b73bb8ba7701ea9e7b1de7072123fe924fcf2a3
parent08da6eff8afede3922be3b3ba138006b2b33ba40 (diff)
mb/google/sarien: Implement touchscreen power sequencing
For touchscreens on sarien, drive the enable GPIO high starting in romstage while holding in reset, then disable the reset GPIO in ramstage. This will allow coreboot to detect the presence of i2c touchscreens during ACPI SSDT generation (implemented in a subsequent commit). BUG=b:121309055 TEST=tested with rest of patch train Change-Id: I3ce7bfc0fa4c03c0bb96bebaa3c3d256f886ecc4 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74237 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
-rw-r--r--src/mainboard/google/sarien/variants/arcada/gpio.c10
-rw-r--r--src/mainboard/google/sarien/variants/sarien/gpio.c10
2 files changed, 16 insertions, 4 deletions
diff --git a/src/mainboard/google/sarien/variants/arcada/gpio.c b/src/mainboard/google/sarien/variants/arcada/gpio.c
index 63df675036..45aed5f219 100644
--- a/src/mainboard/google/sarien/variants/arcada/gpio.c
+++ b/src/mainboard/google/sarien/variants/arcada/gpio.c
@@ -242,6 +242,12 @@ static const struct pad_config early_gpio_table[] = {
/* M2_SKT2_CFG0 */ PAD_CFG_GPO(GPP_H12, 1, DEEP), /* D3 cold RST */
};
+static const struct pad_config romstage_gpio_table[] = {
+ /* Enable touchscreen, hold in reset */
+ PAD_CFG_GPO(GPP_B21, 1, DEEP), /* PCH_3.3V_TS_EN */
+ PAD_CFG_GPO(GPP_E7, 0, DEEP), /* TOUCH_SCREEN_PD# */
+};
+
const struct pad_config *variant_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(gpio_table);
@@ -256,8 +262,8 @@ const struct pad_config *variant_early_gpio_table(size_t *num)
const struct pad_config *variant_romstage_gpio_table(size_t *num)
{
- *num = 0;
- return NULL;
+ *num = ARRAY_SIZE(romstage_gpio_table);
+ return romstage_gpio_table;
}
static const struct cros_gpio cros_gpios[] = {
diff --git a/src/mainboard/google/sarien/variants/sarien/gpio.c b/src/mainboard/google/sarien/variants/sarien/gpio.c
index f9797d3c55..5eb5607505 100644
--- a/src/mainboard/google/sarien/variants/sarien/gpio.c
+++ b/src/mainboard/google/sarien/variants/sarien/gpio.c
@@ -230,6 +230,12 @@ static const struct pad_config early_gpio_table[] = {
/* M2_SKT2_CFG0 */ PAD_CFG_GPO(GPP_H12, 1, DEEP), /* D3 cold RST */
};
+static const struct pad_config romstage_gpio_table[] = {
+ /* Enable touchscreen, hold in reset */
+ PAD_CFG_GPO(GPP_B21, 1, DEEP), /* PCH_3.3V_TS_EN */
+ PAD_CFG_GPO(GPP_E7, 0, DEEP), /* TOUCH_SCREEN_PD# */
+};
+
const struct pad_config *variant_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(gpio_table);
@@ -244,8 +250,8 @@ const struct pad_config *variant_early_gpio_table(size_t *num)
const struct pad_config *variant_romstage_gpio_table(size_t *num)
{
- *num = 0;
- return NULL;
+ *num = ARRAY_SIZE(romstage_gpio_table);
+ return romstage_gpio_table;
}
static const struct cros_gpio cros_gpios[] = {