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authorRaihow Shi <raihow_shi@wistron.corp-partner.google.com>2022-06-09 11:08:28 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-06-14 22:12:02 +0000
commitb0eef7b4bbf5e0d8bde303a3e2df82698dbd1dd5 (patch)
tree256d16a0aeea8ef9d02f455c7ace394266b2ed57
parentfb2116f106afc9a37db77773f220b8089f1e71de (diff)
mb/google/brask/variants/moli: enable use_custom_pld
enable use_custom_pld to match the custom physical location define. BUG=b:235426221 TEST=emerge-brask coreboot. Signed-off-by: Raihow Shi <raihow_shi@wistron.corp-partner.google.com> Change-Id: I62d133eed02faf4e5ad054a0901f73b1196c4c6b Reviewed-on: https://review.coreboot.org/c/coreboot/+/65056 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Won Chung <wonchung@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
-rw-r--r--src/mainboard/google/brya/variants/moli/overridetree.cb14
1 files changed, 13 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb
index c9574499bf..efeab1178b 100644
--- a/src/mainboard/google/brya/variants/moli/overridetree.cb
+++ b/src/mainboard/google/brya/variants/moli/overridetree.cb
@@ -161,12 +161,14 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(FRONT, RIGHT, ACPI_PLD_GROUP(2, 1))"
device ref tcss_usb3_port3 on end
end
@@ -179,18 +181,21 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
- register "type" = "UPC_TYPE_A"
+ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, RIGHT, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A4 (MLB)""
register "type" = "UPC_TYPE_A"
+ register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, LEFT, ACPI_PLD_GROUP(4, 1))"
device ref usb2_port4 on end
end
@@ -202,18 +207,21 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A3 (MLB)""
register "type" = "UPC_TYPE_A"
+ register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, CENTER, ACPI_PLD_GROUP(5, 1))"
device ref usb2_port6 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A2 (MLB)""
register "type" = "UPC_TYPE_A"
+ register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, LEFT, ACPI_PLD_GROUP(6, 1))"
device ref usb2_port7 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A1 (MLB)""
register "type" = "UPC_TYPE_A"
+ register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, CENTER, ACPI_PLD_GROUP(7, 1))"
device ref usb2_port8 on end
end
@@ -226,24 +234,28 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A1 (MLB)""
register "type" = "UPC_TYPE_USB3_A"
+ register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, CENTER, ACPI_PLD_GROUP(7, 2))"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A2 (MLB)""
register "type" = "UPC_TYPE_USB3_A"
+ register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, LEFT, ACPI_PLD_GROUP(6, 1))"
device ref usb3_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A3 (MLB)""
register "type" = "UPC_TYPE_USB3_A"
+ register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, CENTER, ACPI_PLD_GROUP(5, 1))"
device ref usb3_port3 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A4 (MLB)""
register "type" = "UPC_TYPE_USB3_A"
+ register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, LEFT, ACPI_PLD_GROUP(4, 1))"
device ref usb3_port4 on end
end