diff options
| author | Zhuohao Lee <zhuohao@chromium.org> | 2022-03-25 00:10:49 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-27 15:33:04 +0000 |
| commit | b0769db48ff394b1e71a139bc7ccd5b92ca13789 (patch) | |
| tree | 034f530f1480a80ba085c406de67e93766d22d1c | |
| parent | 879d04bf53c3cb35002c36fbaeb536a62f87ceab (diff) | |
mb/google/brya/variants/baseboard/brask: set GPP_D0 to GPO
Currently, we control the GPP_D0 in the flash_fp_mcu in order to
program the component's firmware. If we set this pin to NC, then we
can't control the GPP_D0 output low/high and that make the system fails
to program the component's firmware. This patch sets the GPP_D0 to GPO
to fix it.
BUG=b:204679292
BRANCH=firmware-brya-14505.B
TEST=program the component's firmware
Change-Id: I2f58c324f807a067dbe338f044a33dc9622ca469
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63090
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/brask/gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c index ed0416b022..c540d76261 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c @@ -118,7 +118,7 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_C7, NONE), /* D0 : ISH_GP0 ==> PCH_FP_BOOT0 */ - PAD_NC_LOCK(GPP_D0, NONE, LOCK_CONFIG), + PAD_CFG_GPO_LOCK(GPP_D0, 0, LOCK_CONFIG), /* D1 : ISH_GP1 ==> FP_RST_ODL */ PAD_CFG_GPO_LOCK(GPP_D1, 1, LOCK_CONFIG), /* D2 : ISH_GP2 ==> EN_FP_PWR */ |