chromeos / broadwell / jecht: Make save_chromeos_gpios() jecht-specific

This callback was only required for a single mainboard, and it can
easily be moved to mainboard-specific code. This patch removes it from
the global namespace and isolates it to the Jecht board. (This makes
it easier to separate vboot and chromeos code in a later patch.)

Change-Id: I9cf67a75a052d1c86eda0393b6a9fbbe255fedf8
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/18981
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)

6 files changed, 7 insertions, 12 deletions

diff --git a/src/mainboard/google/jecht/chromeos.c b/src/mainboard/google/jecht/chromeos.c
index 5f897f32fc..f99fd6d438 100644
--- a/src/mainboard/google/jecht/chromeos.c
+++ b/src/mainboard/google/jecht/chromeos.c
@@ -22,6 +22,7 @@
 #include <ec/google/chromeec/ec.h>
 #include <soc/gpio.h>
 #include <soc/sata.h>
+#include "onboard.h"
 
 #define GPIO_SPI_WP	58
 #define GPIO_REC_MODE	12
diff --git a/src/mainboard/google/jecht/onboard.h b/src/mainboard/google/jecht/onboard.h
index 96c792c58a..a911fe60b8 100644
--- a/src/mainboard/google/jecht/onboard.h
+++ b/src/mainboard/google/jecht/onboard.h
@@ -19,6 +19,8 @@
 #ifndef __ACPI__
 void lan_init(void);
 
+void save_chromeos_gpios(void);
+
 void set_power_led(int state);
 
 enum {
diff --git a/src/mainboard/google/jecht/romstage.c b/src/mainboard/google/jecht/romstage.c
index a71d3fe53c..6203a1e457 100644
--- a/src/mainboard/google/jecht/romstage.c
+++ b/src/mainboard/google/jecht/romstage.c
@@ -46,6 +46,9 @@ void mainboard_romstage_entry(struct romstage_params *rp)
 
 	/* Call into the real romstage main with this board's attributes. */
 	romstage_common(rp);
+
+	if (IS_ENABLED(CONFIG_CHROMEOS))
+		save_chromeos_gpios();
 }
 
 void mainboard_pre_console_init(void)
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index bd63e005f3..af95530c77 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -19,6 +19,7 @@
 #include <arch/io.h>
 #include <arch/cbfs.h>
 #include <arch/early_variables.h>
+#include <bootmode.h>
 #include <console/console.h>
 #include <cbfs.h>
 #include <cbmem.h>
@@ -35,7 +36,6 @@
 #include <soc/reset.h>
 #include <soc/romstage.h>
 #include <soc/spi.h>
-#include <vendorcode/google/chromeos/chromeos.h>
 
 /* Entry from cache-as-ram.inc. */
 asmlinkage void *romstage_main(unsigned long bist,
@@ -79,10 +79,6 @@ asmlinkage void *romstage_main(unsigned long bist,
 	/* Call into mainboard. */
 	mainboard_romstage_entry(&rp);
 
-#if CONFIG_CHROMEOS
-	save_chromeos_gpios();
-#endif
-
 	return setup_stack_and_mttrs();
 }
 
diff --git a/src/vendorcode/google/chromeos/chromeos.c b/src/vendorcode/google/chromeos/chromeos.c
index 4edf74a844..515b79f45d 100644
--- a/src/vendorcode/google/chromeos/chromeos.c
+++ b/src/vendorcode/google/chromeos/chromeos.c
@@ -23,11 +23,6 @@ int __attribute__((weak)) clear_recovery_mode_switch(void)
 	return 0;
 }
 
-void __attribute__((weak)) save_chromeos_gpios(void)
-{
-	// Can be implemented by a mainboard
-}
-
 int __attribute__((weak)) get_sw_write_protect_state(void)
 {
 	// Can be implemented by a platform / mainboard
diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h
index 722d62eed5..e535751719 100644
--- a/src/vendorcode/google/chromeos/chromeos.h
+++ b/src/vendorcode/google/chromeos/chromeos.h
@@ -24,8 +24,6 @@
 #include <vboot/misc.h>
 #include <vboot/vboot_common.h>
 
-void save_chromeos_gpios(void);
-
 #if CONFIG_CHROMEOS
 /* functions implemented in watchdog.c */
 void mark_watchdog_tombstone(void);