diff options
author | John Su <john_su@compal.corp-partner.google.com> | 2019-11-26 10:39:45 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-04 14:09:08 +0000 |
commit | afd687f71f629bbdf6c5bb25ac43e32079853a0c (patch) | |
tree | 5e4c74d2e754bb0eb4cde6805c6685e1b998b489 | |
parent | d9105d98b7cf98bec64f53ee1fb786599279b336 (diff) |
mb/google/drallion/variants/drallion: Adjust all I2C CLK to meet spec
After adjustment on Drallion
Touch Pad CLK: 393 KHz
Touch Screen CLK: 381 KHz
H1 CLK: 391 KHz
BUG=b:144245601
BRANCH=master
TEST=emerge-drallion coreboot chromeos-bootimage
measure by scope with drallion.
Change-Id: Id669d7199bc6ed4b55d7542f095c6c8baf00f984
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37230
Reviewed-by: Mathew King <mathewk@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/mainboard/google/drallion/variants/drallion/devicetree.cb | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb index 2fcf191eae..75fd3ee09b 100644 --- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb +++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb @@ -176,20 +176,20 @@ chip soc/intel/cannonlake .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, .i2c[0] = { .speed = I2C_SPEED_FAST, - .rise_time_ns = 52, - .fall_time_ns = 110, + .rise_time_ns = 180, + .fall_time_ns = 200, }, .i2c[1] = { .speed = I2C_SPEED_FAST, - .rise_time_ns = 52, - .fall_time_ns = 110, + .rise_time_ns = 30, + .fall_time_ns = 80, .data_hold_time_ns = 330, }, .i2c[4] = { .early_init = 1, .speed = I2C_SPEED_FAST, - .rise_time_ns = 36, - .fall_time_ns = 99, + .rise_time_ns = 30, + .fall_time_ns = 60, }, }" |