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authorRaul E Rangel <rrangel@chromium.org>2021-02-24 16:26:34 -0700
committerMartin Roth <martinroth@google.com>2021-03-02 16:54:33 +0000
commita91eb90d44bccd0a785b4659ebbeae5da08eea83 (patch)
treea846af5a277f4a90244c4cc473208a4f3d2ad396
parent3173f857b63afaa4b4d4119311db7f6fb9191d09 (diff)
soc/amd/common/blocks/lpc: Explicitly disable serial IRQ
The serirq enable bit defaults to true, so if we want it disabled, we need to explicitly disable it. BUG=b:180631748 TEST=Boot majolica and see spurious IRQ 9 gone. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I7f1e18f836f29cb75334dd88c91ad047f5bdfb10 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51077 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
-rw-r--r--src/soc/amd/common/block/lpc/lpc.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/soc/amd/common/block/lpc/lpc.c b/src/soc/amd/common/block/lpc/lpc.c
index 1d019a3403..2586ba95c5 100644
--- a/src/soc/amd/common/block/lpc/lpc.c
+++ b/src/soc/amd/common/block/lpc/lpc.c
@@ -28,7 +28,9 @@ static void setup_serirq(void)
u8 byte;
/* Set up SERIRQ, enable continuous mode */
- byte = (PM_SERIRQ_NUM_BITS_21 | PM_SERIRQ_ENABLE);
+ byte = PM_SERIRQ_NUM_BITS_21;
+ if (!CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI))
+ byte |= PM_SERIRQ_ENABLE;
if (!CONFIG(SERIRQ_CONTINUOUS_MODE))
byte |= PM_SERIRQ_MODE;
@@ -91,8 +93,7 @@ static void lpc_init(struct device *dev)
/* Initialize i8254 timers */
setup_i8254();
- if (!CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI))
- setup_serirq();
+ setup_serirq();
}
static void lpc_read_resources(struct device *dev)