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authorVarshit B Pandya <varshit.b.pandya@intel.com>2022-03-20 22:20:11 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-08-18 18:24:21 +0000
commita872b9a3bb330c4e6b5e20609af7b2c63bb598ba (patch)
tree182e525054b15e29649d1e0e5e529c866d58cb03
parent61b90b173d2f4e958c04e0a0467812f76c10034c (diff)
ec/google: Notify DPTF driver power participant on PD event
The DPTF power participant device needs to be notified when power source changes so it can re-evaluate power source and power source change count, this can be later used by DPTF along with methods provided by EC. Corresponding changes in EC are https://crrev.com/c/3545778 and https://crrev.com/c/3547317 BUG=b:205928013 TEST=Build, boot brya0 and dump DSDT to check change Signed-off-by: Varshit B Pandya <varshit.b.pandya@intel.com> Change-Id: I07f58b928a0dba92bec3817177142c586e5014b9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62946 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
-rw-r--r--src/ec/google/chromeec/acpi/ec.asl9
-rw-r--r--src/ec/google/chromeec/acpi/emem.asl2
2 files changed, 11 insertions, 0 deletions
diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl
index c0c1abb9ad..ae4758af8b 100644
--- a/src/ec/google/chromeec/acpi/ec.asl
+++ b/src/ec/google/chromeec/acpi/ec.asl
@@ -6,6 +6,9 @@
* re-evaluate their _PPC and _CST tables.
*/
+// DTT Power Participant Device Notification
+#define POWER_STATE_CHANGE_NOTIFICATION 0x81
+
// Mainboard specific throttle handler
#ifdef DPTF_ENABLE_CHARGER
External (\_SB.DPTF.TCHG, DeviceObj)
@@ -15,6 +18,8 @@ External (\_SB.DPTF.TCHG, DeviceObj)
External(\_SB.DPTC, MethodObj)
#endif
+External (\_SB.DPTF.TPWR, DeviceObj)
+
Device (EC0)
{
Name (_HID, EISAID ("PNP0C09"))
@@ -82,6 +87,7 @@ Device (EC0)
BTID, 8, // Battery index that host wants to read
USPP, 8, // USB Port Power
RFWU, 8, // Retimer Firmware Update
+ PBOK, 8, // Power source change count from dptf
}
#if CONFIG(EC_GOOGLE_CHROMEEC_ACPI_MEMMAP)
@@ -345,6 +351,9 @@ Device (EC0)
{
Printf ("EC: GOT PD EVENT")
Notify (\_SB.PCI0.LPCB.EC0.CREC.ECPD, 0x80)
+ If (CondRefOf (\_SB.DPTF.TPWR)) {
+ Notify (\_SB.DPTF.TPWR, POWER_STATE_CHANGE_NOTIFICATION)
+ }
}
#endif
diff --git a/src/ec/google/chromeec/acpi/emem.asl b/src/ec/google/chromeec/acpi/emem.asl
index 3eec35eadf..dd59503bb6 100644
--- a/src/ec/google/chromeec/acpi/emem.asl
+++ b/src/ec/google/chromeec/acpi/emem.asl
@@ -51,3 +51,5 @@ Offset (0x80),
ALS0, 16, // ALS reading 0 in lux
Offset (0xa6),
GPUD, 8, // GPU Data
+Offset (0xa7),
+PWRT, 8, // Power source and change count