diff options
| author | Shelley Chen <shchen@chromium.org> | 2017-11-21 15:47:12 -0800 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2017-11-23 01:14:09 +0000 |
| commit | a35ad0e6ee7826dc1f171291116f306099c99e72 (patch) | |
| tree | 89e82ecd473fabdf5511a93a0fa61dacab7cf1dc | |
| parent | cae58f130673b132758efbac771213badc2d27df (diff) | |
google/fizz: Define smbios_mainboard_sku to return OEM IDs
Currently, mosys just returns "fizz" as model/chassis values.
Returning proper OEM IDs so that mosys can return the proper
variant.
BUG=b:67732053
BRANCH=None
TEST=mosys platform model; mosys platform chassis;
Make sure returns the right variant string and not fizz.
Change-Id: I42e293e833b0f7c9870dc275561ad13256836e60
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://review.coreboot.org/22557
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
| -rw-r--r-- | src/mainboard/google/fizz/gpio.h | 14 | ||||
| -rw-r--r-- | src/mainboard/google/fizz/mainboard.c | 25 |
2 files changed, 36 insertions, 3 deletions
diff --git a/src/mainboard/google/fizz/gpio.h b/src/mainboard/google/fizz/gpio.h index d063e8d9d8..d54a1fed0f 100644 --- a/src/mainboard/google/fizz/gpio.h +++ b/src/mainboard/google/fizz/gpio.h @@ -37,6 +37,11 @@ #define GPIO_SKU_ID2 GPP_C14 #define GPIO_SKU_ID3 GPP_C15 +/* OEM ID GPIOs */ +#define GPIO_OEM_ID1 GPP_D10 +#define GPIO_OEM_ID2 GPP_D11 +#define GPIO_OEM_ID3 GPP_D12 + #ifndef __ACPI__ /* Pad configuration in ramstage */ /* Leave eSPI pins untouched from default settings */ @@ -163,9 +168,12 @@ static const struct pad_config gpio_table[] = { /* ISH_I2C1_SCL */ PAD_CFG_NC(GPP_D8), /* ISH_SPI_CS# */ PAD_CFG_GPI_INT(GPP_D9, NONE, PLTRST, EDGE), /* HP_IRQ_GPIO */ -/* ISH_SPI_CLK */ PAD_CFG_NC(GPP_D10), -/* ISH_SPI_MISO */ PAD_CFG_NC(GPP_D11), -/* ISH_SPI_MOSI */ PAD_CFG_NC(GPP_D12), +/* ISH_SPI_CLK */ PAD_CFG_GPI_GPIO_DRIVER(GPP_D10, NONE, + DEEP), /* OEM_ID1 */ +/* ISH_SPI_MISO */ PAD_CFG_GPI_GPIO_DRIVER(GPP_D11, NONE, + DEEP), /* OEM_ID2 */ +/* ISH_SPI_MOSI */ PAD_CFG_GPI_GPIO_DRIVER(GPP_D12, NONE, + DEEP), /* OEM_ID3 */ /* ISH_UART0_RXD */ PAD_CFG_NC(GPP_D13), /* ISH_UART0_TXD */ PAD_CFG_NC(GPP_D14), /* ISH_UART0_RTS# */ PAD_CFG_NC(GPP_D15), diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c index ae3767579e..54d7c4c103 100644 --- a/src/mainboard/google/fizz/mainboard.c +++ b/src/mainboard/google/fizz/mainboard.c @@ -21,9 +21,11 @@ #include <ec/google/chromeec/ec.h> #include <gpio.h> #include <mainboard/google/fizz/gpio.h> +#include <smbios.h> #include <soc/gpio.h> #include <soc/pci_devs.h> #include <soc/nhlt.h> +#include <string.h> #include <vendorcode/google/chromeos/chromeos.h> #define FIZZ_SKU_ID_I7_U42 0x4 @@ -74,6 +76,29 @@ static u32 mainboard_get_pl2(void) return watts; } +static uint8_t board_oem_id(void) +{ + static int board_oem_id = -1; + const gpio_t oem_id_gpios[] = { + GPIO_OEM_ID1, + GPIO_OEM_ID2, + GPIO_OEM_ID3, + }; + if (board_oem_id < 0) + board_oem_id = gpio_base2_value(oem_id_gpios, + ARRAY_SIZE(oem_id_gpios)); + return board_oem_id; +} + +const char *smbios_mainboard_sku(void) +{ + static char sku_str[5]; /* sku{0..7} */ + + snprintf(sku_str, sizeof(sku_str), "sku%d", board_oem_id()); + + return sku_str; +} + static void mainboard_init(device_t dev) { mainboard_ec_init(); |