resolve conflict

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2260 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 31 insertions, 20 deletions

diff --git a/src/mainboard/amd/rumba/auto.c b/src/mainboard/amd/rumba/auto.c
index ac9c2e5222..3f966047ca 100644
--- a/src/mainboard/amd/rumba/auto.c
+++ b/src/mainboard/amd/rumba/auto.c
@@ -108,38 +108,39 @@ static void msr_init(void)
 
 	__builtin_wrmsr(0x10000020, 0xfff80, 0x20000000);
         __builtin_wrmsr(0x10000021, 0x80fffe0, 0x20000000);
-        __builtin_wrmsr(0x10000026, 0x400fffc0, 0x2cfbc040);
-        __builtin_wrmsr(0x10000027, 0xfff00000, 0xff);
-        __builtin_wrmsr(0x10000028, 0x7bf00100, 0x2000000f);
-        __builtin_wrmsr(0x1000002c, 0xff030003, 0x20000000);
+        //__builtin_wrmsr(0x10000026, 0x400fffc0, 0x2cfbc040);
+        //__builtin_wrmsr(0x10000027, 0xfff00000, 0xff);
+        //__builtin_wrmsr(0x10000028, 0x7bf00100, 0x2000000f);
+        //__builtin_wrmsr(0x1000002c, 0xff030003, 0x20000000);
 
-        __builtin_wrmsr(0x10000080, 0x3, 0x0);
+	// __builtin_wrmsr(0x10000080, 0x3, 0x0);
 
         __builtin_wrmsr(0x40000020, 0xfff80, 0x20000000);
         __builtin_wrmsr(0x40000021, 0x80fffe0, 0x20000000);
-	__builtin_wrmsr(0x40000023, 0x400fffc0, 0x20000040);
-        __builtin_wrmsr(0x40000024, 0xff4ffffc, 0x200000ef);
-        __builtin_wrmsr(0x40000029, 0x7bf00100, 0x2000000f);
-        __builtin_wrmsr(0x4000002d, 0xff030003, 0x20000000);
+	//__builtin_wrmsr(0x40000023, 0x400fffc0, 0x20000040);
+        //__builtin_wrmsr(0x40000024, 0xff4ffffc, 0x200000ef);
+        //__builtin_wrmsr(0x40000029, 0x7bf00100, 0x2000000f);
+        //__builtin_wrmsr(0x4000002d, 0xff030003, 0x20000000);
 
 
-        __builtin_wrmsr(0x50002001, 0x27, 0x0);
-        __builtin_wrmsr(0x4c002001, 0x1, 0x0);
+        //__builtin_wrmsr(0x50002001, 0x27, 0x0);
+        //__builtin_wrmsr(0x4c002001, 0x1, 0x0);
 #if 1
-        __builtin_wrmsr(0x4c00000c, 0x0, 0x08);
-	__builtin_wrmsr(0x4c000016, 0x0, 0x0);
-	__builtin_wrmsr(0x4c00000c, 0x1, 0x0);
-	__builtin_wrmsr(0x4c00005e, 0x03880000, 0x00);
-	__builtin_wrmsr(0x4c00006f, 0x0000f000, 0x00);
-	__builtin_wrmsr(0x4c00005f, 0x08000000, 0x00);
-	__builtin_wrmsr(0x4c00000d, 0x82b5ad68, 0x80ad6b57);
-	__builtin_wrmsr(0x4c00000c, 0x0, 0x0);
+        //__builtin_wrmsr(0x4c00000c, 0x0, 0x08);
+	//__builtin_wrmsr(0x4c000016, 0x0, 0x0);
+	//__builtin_wrmsr(0x4c00000c, 0x1, 0x0);
+	//__builtin_wrmsr(0x4c00005e, 0x03880000, 0x00);
+	//__builtin_wrmsr(0x4c00006f, 0x0000f000, 0x00);
+	//__builtin_wrmsr(0x4c00005f, 0x08000000, 0x00);
+	//__builtin_wrmsr(0x4c00000d, 0x82b5ad68, 0x80ad6b57);
+	//__builtin_wrmsr(0x4c00000c, 0x0, 0x0);
 #endif
 }
 
 
 static void main(unsigned long bist)
 {
+	msr_t msr;
 	static const struct mem_controller memctrl [] = {
 		{.channel0 = {(0xa<<3)|0, (0xa<<3)|1}}
 	};
@@ -160,7 +161,10 @@ static void main(unsigned long bist)
 	
 	sdram_initialize(1, memctrl);
 
-	
+	print_err("reading MSR 0x51102000\n\t");
+	msr = rdmsr(0x51102000);
+	print_debug_hex32(msr.hi);
+
 	/* Check all of memory */
 	//ram_check(0x00000000, 640*1024);
 }
diff --git a/src/northbridge/amd/gx2/pll_reset.c b/src/northbridge/amd/gx2/pll_reset.c
index ea54c49277..504658576d 100644
--- a/src/northbridge/amd/gx2/pll_reset.c
+++ b/src/northbridge/amd/gx2/pll_reset.c
@@ -125,6 +125,13 @@ static void pll_reset(void)
 	msr = rdmsr(GLCP_SYS_RSTPLL);
 	if (msr.lo & (1 << GLCP_SYS_RSTPLL_BYPASS)) {
 #if 0
+		print_debug("MSR ");
+		print_debug_hex32(GLCP_SYS_RSTPLL);
+		print_debug("is ");
+		print_debug_hex32(msr.hi);
+		print_debug(":");
+		print_debug_hex32(msr.lo);
+
 		msr.hi = PLLMSRhi;
 		msr.lo = PLLMSRlo;
 		wrmsr(GLCP_SYS_RSTPLL, msr);