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authorFrans Hendriks <fhendriks@eltan.com>2018-12-17 11:51:34 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-19 05:50:48 +0000
commit9622024a95e140fcbf8a28d131688b8db039b2c8 (patch)
tree923261351f88ada54056da66cec174b752fb079f
parent3f6891108b053f917b18b3fabebaa85c93249c27 (diff)
soc/intel/braswell/linclude/soc/device_nvs.h: Fix typo
Use 'BAR 1' for the bar1 structure fields. BUG=N/A TEST=Intel CherryHill CRB Change-Id: I1d1278f549fc8a2f3e743e2e2019d3e5f7005614 Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/30277 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
-rw-r--r--src/soc/intel/braswell/include/soc/device_nvs.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/braswell/include/soc/device_nvs.h b/src/soc/intel/braswell/include/soc/device_nvs.h
index e98337cdea..1b4f3ba6b2 100644
--- a/src/soc/intel/braswell/include/soc/device_nvs.h
+++ b/src/soc/intel/braswell/include/soc/device_nvs.h
@@ -3,6 +3,7 @@
*
* Copyright (C) 2013 Google Inc.
* Copyright (C) 2015 Intel Corp.
+ * Copyright (C) 2018 Eltan B.V.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -49,7 +50,7 @@ typedef struct {
u32 scc_bar0[3];
u32 lpe_bar0;
- /* BAR 0 */
+ /* BAR 1 */
u32 lpss_bar1[14];
u32 scc_bar1[3];
u32 lpe_bar1;