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authorElyes Haouas <ehaouas@noos.fr>2024-05-06 13:01:20 +0200
committerElyes Haouas <ehaouas@noos.fr>2024-05-09 11:24:40 +0000
commit94c6cd14803e05c483a5831c2526306a988c8103 (patch)
treef49c827b106c2948149240722b9563e22e5771b4
parent365cd348133df601ecf50e3e86d4b879ab7bd689 (diff)
include/spd.h: Add SPD_MEMORY_TYPE_LPDDR3_INTEL into spd_memory_type
Change-Id: I694af163fb530be49561e74e74d9c08e04986a44 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82223 Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/include/spd.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/spd.h b/src/include/spd.h
index 5d32447282..ff7c73ebb5 100644
--- a/src/include/spd.h
+++ b/src/include/spd.h
@@ -159,6 +159,8 @@ enum spd_memory_type {
SPD_MEMORY_TYPE_LPDDR5_SDRAM = 0x13,
SPD_MEMORY_TYPE_DDR5_NVDIMM_P = 0x14,
SPD_MEMORY_TYPE_LPDDR5X_SDRAM = 0x15,
+ /* This is not a JEDEC module type ID */
+ SPD_MEMORY_TYPE_LPDDR3_INTEL = 0xf1,
};
/* SPD_MODULE_VOLTAGE values. */