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authorMAULIK V VAGHELA <maulik.v.vaghela@intel.com>2022-01-24 10:39:58 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-01-31 10:33:32 +0000
commit948ed24ac5d437c2cbda9fc6beb076b72c3f2a4a (patch)
treef8be9e02b05046fa72307d2f8bc8f260f323b64d
parent5e8ecf5567c12f1db1f348577af525c784c2b6f9 (diff)
intel/common/block/pcie: Add NULL/count check in pcie_rp_update_devtree
pcie_rp_update_devicetree function takes pcie_rp_group strcuture as an argument and SoC code passes the parameter in this structure. This pointer can be NULL and common code may try to dereference this NULL pointer. Also, group might have no data and SoC may pass this by indicating group count as zero (For example, for CPU or TBT root ports). These checks will prevent function from executing redundant code and returning early from the call as it's not required. BUG=b:210933428 BRANCH=None TEST=check if function returns early for group count 0 and there is no issue while booting board in case group count = 0. Change-Id: I132319bb05fdef1590c18302fc64cc76e15bea6d Signed-off-by: MAULIK V VAGHELA <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61331 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
-rw-r--r--src/soc/intel/common/block/pcie/pcie_rp.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/pcie/pcie_rp.c b/src/soc/intel/common/block/pcie/pcie_rp.c
index 1c69f2c355..221ee03a94 100644
--- a/src/soc/intel/common/block/pcie/pcie_rp.c
+++ b/src/soc/intel/common/block/pcie/pcie_rp.c
@@ -130,6 +130,9 @@ void pcie_rp_update_devicetree(const struct pcie_rp_group *const groups)
int mapping[CONFIG_MAX_ROOT_PORTS];
unsigned int offset, i;
+ if (!groups || !groups->count)
+ return;
+
struct bus *const root = pci_root_bus();
if (!root)
return;