diff options
author | Aaron Durbin <adurbin@chromium.org> | 2017-12-22 17:13:17 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-01-05 01:16:50 +0000 |
commit | 931ed7faa97b3f2954123ba8d0b5fd330ef10bf3 (patch) | |
tree | 6d8b9e48c20ded3f041c1f45ccaff5d627cd491b | |
parent | 922619512def4ef62c13c97b78321c6e6e610153 (diff) |
soc/amd/common: load post-memory AGESA as rmodule
Now that the AGESA binary is split into two sections load the
post-memory AGESA binary into ram. It needs to be an rmdoule
so that it can be relocated into ram.
agesawrapper_amdinitenv() entry
CBFS: 'VBOOT' located CBFS at [10000:cfd40)
CBFS: Locating 'AGESA_POST_MEM'
CBFS: Found @ offset 875c0 size 11c5e
Decompressing stage AGESA_POST_MEM @ 0xc757ffc0 (183452 bytes)
Loading module at c7580000 with entry c7580000. filesize: 0x2bafc
memsize: 0x2bb0d
Processing 1112 relocs. Offset value of 0xc7780000
AGESA call 00020001 using c75818fe
AGESA call 00020003 using c75818fe
Fch OEM config in INIT ENV Done
agesawrapper_amdinitenv() returned AGESA_SUCCESS
BUG=b:68141063,b:70714803
TEST=Booted kahlee.
Change-Id: Ic0454e0d6909cb34ae8be2f4f221152532754d61
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/22976
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
-rw-r--r-- | src/soc/amd/common/block/pi/agesawrapper.c | 29 | ||||
-rw-r--r-- | src/vendorcode/amd/pi/00670F00/Makefile.inc | 18 |
2 files changed, 41 insertions, 6 deletions
diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c index 3e06f9e9db..ed10568fb2 100644 --- a/src/soc/amd/common/block/pi/agesawrapper.c +++ b/src/soc/amd/common/block/pi/agesawrapper.c @@ -21,6 +21,7 @@ #include <cpu/x86/mtrr.h> #include <amdblocks/BiosCallOuts.h> #include <rules.h> +#include <rmodule.h> #include <string.h> #include <timestamp.h> @@ -412,7 +413,8 @@ static int agesa_locate_raw_file(const char *name, struct region_device *rdev) return agesa_locate_file(name, rdev, CBFS_TYPE_RAW); } -static int agesa_locate_stage_file(const char *name, struct region_device *rdev) +static int agesa_locate_stage_file_early(const char *name, + struct region_device *rdev) { const size_t metadata_sz = sizeof(struct cbfs_stage); @@ -424,6 +426,31 @@ static int agesa_locate_stage_file(const char *name, struct region_device *rdev) region_device_sz(rdev) - metadata_sz); } +static int agesa_locate_stage_file_ramstage(const char *name, + struct region_device *rdev) +{ + struct prog prog = PROG_INIT(PROG_REFCODE, name); + struct rmod_stage_load rmod_agesa = { + .cbmem_id = CBMEM_ID_REFCODE, + .prog = &prog, + }; + + if (prog_locate(&prog)) + return -1; + if (rmodule_stage_load(&rmod_agesa) < 0) + return -1; + + return rdev_chain(rdev, prog_rdev(&prog), 0, + region_device_sz(prog_rdev(&prog))); +} + +static int agesa_locate_stage_file(const char *name, struct region_device *rdev) +{ + if (!ENV_RAMSTAGE) + return agesa_locate_stage_file_early(name, rdev); + return agesa_locate_stage_file_ramstage(name, rdev); +} + static const char *get_agesa_cbfs_name(void) { if (!IS_ENABLED(CONFIG_AGESA_SPLIT_MEMORY_FILES)) diff --git a/src/vendorcode/amd/pi/00670F00/Makefile.inc b/src/vendorcode/amd/pi/00670F00/Makefile.inc index 22f3e16a56..a17d409ebb 100644 --- a/src/vendorcode/amd/pi/00670F00/Makefile.inc +++ b/src/vendorcode/amd/pi/00670F00/Makefile.inc @@ -124,6 +124,17 @@ ramstage-libs += $(agesa_output_path)/libagesa.a ####################################################################### ifeq ($(CONFIG_AGESA_SPLIT_MEMORY_FILES), y) + +# convert input elf to rmodule +AGESA_POST_MEM_INPUT_ELF = $(call strip_quotes,$(CONFIG_AGESA_POST_MEMORY_BINARY_PI_FILE)) +AGESA_POST_MEM_ELF = $(objcbfs)/$(patsubst %.elf,%.debug,$(notdir $(AGESA_POST_MEM_INPUT_ELF))) +AGESA_POST_MEM_ELF_RMOD = $(AGESA_POST_MEM_ELF).rmod + +$(AGESA_POST_MEM_ELF): $(AGESA_POST_MEM_INPUT_ELF) + cp $< $@ + +$(AGESA_POST_MEM_ELF_RMOD): $(AGESA_POST_MEM_ELF) + cbfs-files-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += $(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME) $(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-file := $(CONFIG_AGESA_PRE_MEMORY_BINARY_PI_FILE) $(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-type := stage @@ -133,12 +144,9 @@ $(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-options := --xip $(CONFIG_AGESA_PRE_MEMORY_CBFS_NAME)-align := 4096 cbfs-files-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += $(CONFIG_AGESA_POST_MEMORY_CBFS_NAME) -$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-file := $(CONFIG_AGESA_POST_MEMORY_BINARY_PI_FILE) +$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-file := $(AGESA_POST_MEM_ELF_RMOD) $(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-type := stage -$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-options := --xip -# 4KiB alignment to handle any interior alignment. Current AGESA only has -# 64 byte alignment. -$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-align := 4096 +$(CONFIG_AGESA_POST_MEMORY_CBFS_NAME)-compression := $(CBFS_COMPRESS_FLAG) else cbfs-files-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += $(CONFIG_AGESA_CBFS_NAME) |