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author | Arthur Heymans <arthur@aheymans.xyz> | 2022-03-23 21:34:56 +0100 |
---|---|---|
committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-11 05:58:20 +0000 |
commit | 901578518fd40ec3c1ebbeef7d4f30e4bf7e663f (patch) | |
tree | 1ce681f1fbe4d3932442c5f84bab67030b2ec96c | |
parent | c2434f4b87047689eb6bba5476a9a65b03fc7dbe (diff) |
amd/f15tn/gcccar.inc: Fix macro with Clang
Change-Id: I0d95ac9d548e410a81188307cc92f77224baea0e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63043
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
-rw-r--r-- | src/vendorcode/amd/agesa/f15tn/gcccar.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/gcccar.inc b/src/vendorcode/amd/agesa/f15tn/gcccar.inc index 68eaed89f2..5a0c1c458b 100644 --- a/src/vendorcode/amd/agesa/f15tn/gcccar.inc +++ b/src/vendorcode/amd/agesa/f15tn/gcccar.inc @@ -224,7 +224,7 @@ MSR_MASK = ((1 << MTRR_DEF_TYPE_EN)+(1 << MTRR_DEF_TYPE_FIX_EN)) .endm .macro MAKE_EXT_PCI_ADDR Seg, Bus, Dev, Func, Offset - mov $(1 << 31 | (Seg) << 28 | (((Offset) & (0x0F00)) >> 8) << 24 | (Bus) << 16 | (Dev) << 11 | (Func) << 8) | ((Offset) & (0xFC)), %eax + mov $(1 << 31 | (\Seg) << 28 | (((\Offset) & (0x0F00)) >> 8) << 24 | (\Bus) << 16 | (\Dev) << 11 | (\Func) << 8) | ((\Offset) & (0xFC)), %eax .endm /**************************************************************************** * |