diff options
| author | Raihow Shi <raihow_shi@wistron.corp-partner.google.com> | 2022-05-04 15:53:54 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-06 13:38:02 +0000 |
| commit | 8e14df3b6f668e4b333d6eed6ac5c848b268db1a (patch) | |
| tree | 31f9c458b3d004f2aa3fd34aff6535fe332e6ea0 | |
| parent | c8a986d14ca3c8b33a073ea9b1042aa281175792 (diff) | |
mb/google/brask/variants/moli: disable ASPM on pcie_rp 6
Currently coreboot will hang on ASPM on pcie_rp 6,
so disable ASPM to let it go into kernel.
BUG=b:231400217
TEST=emerge-brask coreboot.
Signed-off-by: Raihow Shi <raihow_shi@wistron.corp-partner.google.com>
Change-Id: I79a80d97d168f40e58774e5652967d659daa323c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64042
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
| -rw-r--r-- | src/mainboard/google/brya/variants/moli/overridetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb index 2048b61c9a..07839992b4 100644 --- a/src/mainboard/google/brya/variants/moli/overridetree.cb +++ b/src/mainboard/google/brya/variants/moli/overridetree.cb @@ -76,6 +76,7 @@ chip soc/intel/alderlake .clk_src = 5, .clk_req = 5, .flags = PCIE_RP_LTR | PCIE_RP_AER, + .pcie_rp_aspm = ASPM_DISABLE, }" device pci 00.0 on end end # IntelI225V Ethernet NIC |