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authorJonathan Zhang <jonzhang@fb.com>2020-06-30 14:15:51 -0700
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2020-07-02 16:34:57 +0000
commit8cdb0b3767ad46586d75ceccc8696e4641f2b38e (patch)
tree8132ecbc489c6b9c358e219e7c2f45f45c04749f
parente9b0b08079f7170463bd2b3aea6d87e8be0b738a (diff)
mb/ocp: remove sonorapass
Sonora Pass server program was terminated. Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Change-Id: I5354ea1e912fd25f0ac9851edf0461413ad8bb21 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42948 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Christian Walter <christian.walter@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/ocp/sonorapass/Kconfig30
-rw-r--r--src/mainboard/ocp/sonorapass/Kconfig.name2
-rw-r--r--src/mainboard/ocp/sonorapass/Makefile.inc2
-rw-r--r--src/mainboard/ocp/sonorapass/acpi/platform.asl43
-rw-r--r--src/mainboard/ocp/sonorapass/board.fmd10
-rw-r--r--src/mainboard/ocp/sonorapass/board_info.txt5
-rw-r--r--src/mainboard/ocp/sonorapass/bootblock.c67
-rw-r--r--src/mainboard/ocp/sonorapass/devicetree.cb39
-rw-r--r--src/mainboard/ocp/sonorapass/dsdt.asl58
-rw-r--r--src/mainboard/ocp/sonorapass/romstage.c27
10 files changed, 0 insertions, 283 deletions
diff --git a/src/mainboard/ocp/sonorapass/Kconfig b/src/mainboard/ocp/sonorapass/Kconfig
deleted file mode 100644
index 55c144b49b..0000000000
--- a/src/mainboard/ocp/sonorapass/Kconfig
+++ /dev/null
@@ -1,30 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-
-if BOARD_OCP_SONORAPASS
-
-config BOARD_SPECIFIC_OPTIONS
- def_bool y
- select BOARD_ROMSIZE_KB_65536
- select MAINBOARD_USES_FSP2_0
- select IPMI_KCS
- select SOC_INTEL_COOPERLAKE_SP
- select SUPERIO_ASPEED_AST2400
- select HAVE_ACPI_TABLES
-
-config MAINBOARD_DIR
- string
- default "ocp/sonorapass"
-
-config MAINBOARD_PART_NUMBER
- string
- default "SonoraPass"
-
-config MAINBOARD_FAMILY
- string
- default "SonoraPass"
-
-config FMDFILE
- string
- default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/board.fmd"
-
-endif
diff --git a/src/mainboard/ocp/sonorapass/Kconfig.name b/src/mainboard/ocp/sonorapass/Kconfig.name
deleted file mode 100644
index 90e7f3dfdf..0000000000
--- a/src/mainboard/ocp/sonorapass/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_OCP_SONORAPASS
- bool "SonoraPass"
diff --git a/src/mainboard/ocp/sonorapass/Makefile.inc b/src/mainboard/ocp/sonorapass/Makefile.inc
deleted file mode 100644
index 9bd017393c..0000000000
--- a/src/mainboard/ocp/sonorapass/Makefile.inc
+++ /dev/null
@@ -1,2 +0,0 @@
-bootblock-y += bootblock.c
-romstage-y += romstage.c
diff --git a/src/mainboard/ocp/sonorapass/acpi/platform.asl b/src/mainboard/ocp/sonorapass/acpi/platform.asl
deleted file mode 100644
index 964959265f..0000000000
--- a/src/mainboard/ocp/sonorapass/acpi/platform.asl
+++ /dev/null
@@ -1,43 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* The APM port can be used for generating software SMIs */
-
-OperationRegion (APMP, SystemIO, 0xb2, 2)
-Field (APMP, ByteAcc, NoLock, Preserve)
-{
- APMC, 8, // APM command
- APMS, 8 // APM status
-}
-
-/* Port 80 POST */
-
-OperationRegion (POST, SystemIO, 0x80, 1)
-Field (POST, ByteAcc, Lock, Preserve)
-{
- DBG0, 8
-}
-
-Name(\APC1, Zero) // IIO IOAPIC
-
-Name(\PICM, Zero) // IOAPIC/8259
-
-Method(_PIC, 1)
-{
- Store(Arg0, PICM)
-}
-
-/*
- * The _PTS method (Prepare To Sleep) is called before the OS is
- * entering a sleep state. The sleep state number is passed in Arg0
- */
-
-Method(_PTS,1)
-{
-}
-
-/* The _WAK method is called on system wakeup */
-
-Method(_WAK,1)
-{
- Return(Package(){0,0})
-}
diff --git a/src/mainboard/ocp/sonorapass/board.fmd b/src/mainboard/ocp/sonorapass/board.fmd
deleted file mode 100644
index e28bcf08c0..0000000000
--- a/src/mainboard/ocp/sonorapass/board.fmd
+++ /dev/null
@@ -1,10 +0,0 @@
-FLASH@0xfc000000 64M {
- SI_ALL@0x0 0x2fd8000 {
- SI_DESC@0x0 0x1000
- SI_GBE@0x1000 0x2000
- SI_ME@0x3000 0x2fc5000
- }
- FMAP@0x03000000 0x800
- RW_MRC_CACHE@0x3000800 0x10000
- COREBOOT(CBFS)@0x3010800
-}
diff --git a/src/mainboard/ocp/sonorapass/board_info.txt b/src/mainboard/ocp/sonorapass/board_info.txt
deleted file mode 100644
index bbf3ee9b9d..0000000000
--- a/src/mainboard/ocp/sonorapass/board_info.txt
+++ /dev/null
@@ -1,5 +0,0 @@
-Board name: SonoraPass
-Category: server
-ROM protocol: SPI
-ROM socketed: y
-Flashrom support: y
diff --git a/src/mainboard/ocp/sonorapass/bootblock.c b/src/mainboard/ocp/sonorapass/bootblock.c
deleted file mode 100644
index e51073e2a3..0000000000
--- a/src/mainboard/ocp/sonorapass/bootblock.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <bootblock_common.h>
-#include <device/pci_def.h>
-#include <device/pci_ops.h>
-#include <device/pnp_ops.h>
-#include <intelblocks/lpc_lib.h>
-#include <intelblocks/pcr.h>
-#include <soc/pci_devs.h>
-#include <soc/pcr_ids.h>
-#include <superio/aspeed/ast2400/ast2400.h>
-#include <superio/aspeed/common/aspeed.h>
-
-#define ASPEED_CONFIG_INDEX 0x2E
-#define ASPEED_CONFIG_DATA 0x2F
-
-static void enable_espi_lpc_io_windows(void)
-{
- /*
- * Set up decoding windows on PCH over PCR. The CPUs use two of AST2500 SIO ports,
- * one is connected to debug header (SUART1) and another is used as SOL (SUART2).
- * For that end it is wired into BMC virtual port.
- */
-
- /* Open IO windows: 0x3f8 for com1 and 02e8 for com2 */
- pcr_or32(PID_DMI, PCR_DMI_LPCIOD, (0 << 0) | (1 << 4));
- /* LPC I/O enable: com1 and com2 */
- pcr_or32(PID_DMI, PCR_DMI_LPCIOE, (1 << 0) | (1 << 1));
-
- /* Enable com1 (0x3f8), com2 (02f8) and superio (0x2e) */
- pci_mmio_write_config32(PCH_DEV_LPC, 0x80,
- (1 << 28) | (1 << 16) | (1 << 17) | (0 << 0) | (1 << 4));
-}
-
-static uint8_t com_to_ast_sio(uint8_t com)
-{
- switch (com) {
- case 0:
- return AST2400_SUART1;
- case 1:
- return AST2400_SUART2;
- case 2:
- return AST2400_SUART3;
- case 4:
- return AST2400_SUART4;
- default:
- return AST2400_SUART1;
- }
-}
-
-void bootblock_mainboard_early_init(void)
-{
- /* Open IO windows */
- enable_espi_lpc_io_windows();
-
- /* Configure appropriate physical port of SuperIO chip off BMC */
- const pnp_devfn_t serial_dev = PNP_DEV(ASPEED_CONFIG_INDEX,
- com_to_ast_sio(CONFIG_UART_FOR_CONSOLE));
- aspeed_enable_serial(serial_dev, CONFIG_TTYS0_BASE);
-
- /* Port 80h direct to GPIO for LED display */
- const pnp_devfn_t gpio_dev = PNP_DEV(ASPEED_CONFIG_INDEX, AST2400_GPIO);
- aspeed_enable_port80_direct_gpio(gpio_dev, GPIOH);
-
- /* Enable UART function pin*/
- aspeed_enable_uart_pin(serial_dev);
-}
diff --git a/src/mainboard/ocp/sonorapass/devicetree.cb b/src/mainboard/ocp/sonorapass/devicetree.cb
deleted file mode 100644
index 05dac455e3..0000000000
--- a/src/mainboard/ocp/sonorapass/devicetree.cb
+++ /dev/null
@@ -1,39 +0,0 @@
-chip soc/intel/xeon_sp/cpx
- device cpu_cluster 0 on
- device lapic 0 on end
- end
- device domain 0 on
- device pci 00.0 on end # Host bridge
- device pci 04.0 on end
- device pci 04.1 on end
- device pci 04.2 on end
- device pci 04.3 on end
- device pci 04.4 on end
- device pci 04.5 on end
- device pci 04.6 on end
- device pci 04.7 on end
- device pci 05.0 on end
- device pci 05.2 on end
- device pci 05.4 on end
- device pci 08.0 on end
- device pci 08.1 on end
- device pci 08.2 on end
- device pci 11.0 on end
- device pci 11.1 on end
- device pci 11.5 on end
- device pci 14.0 on end
- device pci 16.0 on end
- device pci 16.1 on end
- device pci 16.4 on end
- device pci 17.0 on end
- device pci 1c.0 on end
- device pci 1c.4 on end
- device pci 1f.2 on end
- device pci 1f.4 on end
- device pci 1f.5 on end
-
- device pci 1f.0 on # LPC/eSPI Interface
- end
-
- end
-end
diff --git a/src/mainboard/ocp/sonorapass/dsdt.asl b/src/mainboard/ocp/sonorapass/dsdt.asl
deleted file mode 100644
index 6f408b36da..0000000000
--- a/src/mainboard/ocp/sonorapass/dsdt.asl
+++ /dev/null
@@ -1,58 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <acpi/acpi.h>
-#include <soc/iomap.h>
-
-DefinitionBlock(
- "dsdt.aml",
- "DSDT",
- 0x02, // DSDT revision: ACPI v2.0 and up
- OEM_ID,
- ACPI_TABLE_CREATOR,
- 0x20110725 // OEM revision
-)
-{
- #include "acpi/platform.asl"
-
- Name(_S0, Package() { 0x00, 0x00, 0x00, 0x00 })
- Name(_S5, Package() { 0x07, 0x00, 0x00, 0x00 })
-
- Scope (\_SB)
- {
- Device (PCI0)
- {
- #include <soc/intel/xeon_sp/cpx/acpi/southcluster.asl>
- #include <soc/intel/common/block/acpi/acpi/lpc.asl>
-
- }
-
-
- Device (UNC0)
- {
- Name (_HID, EisaId ("PNP0A03"))
- Name (_UID, 0x3F)
- Method (_BBN, 0, NotSerialized)
- {
- Return (0xff)
- }
-
- Method (_STA, 0, NotSerialized)
- {
- Return (0xf)
- }
-
- Name (_CRS, ResourceTemplate ()
- {
- WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
- 0x0000, // Granularity
- 0x00FF, // Range Minimum
- 0x00FF, // Range Maximum
- 0x0000, // Translation Offset
- 0x0001, // Length
- ,, )
- })
-
- }
- }
-
-}
diff --git a/src/mainboard/ocp/sonorapass/romstage.c b/src/mainboard/ocp/sonorapass/romstage.c
deleted file mode 100644
index 4ea00b6583..0000000000
--- a/src/mainboard/ocp/sonorapass/romstage.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <soc/romstage.h>
-
-void mainboard_memory_init_params(FSPM_UPD *mupd)
-{
- FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
- void *start = (void *) m_cfg;
-
- // BoardId
- *((uint8_t *) (start + 140)) = 0x1d;
- // BoardTypeBitmask
- *((uint32_t *) (start + 104)) = 0x11111111;
- // DebugPrintLevel
- *((uint8_t *) (start + 45)) = 8;
- // KtiLinkSpeedMode
- *((uint8_t *) (start + 64)) = 0;
- // mmiolSize
- *((uint32_t *) (start + 88)) = 0;
- // mmiohBase
- *((uint32_t *) (start + 92)) = 0x2000;
- // KtiPrefetchEn
- *((uint8_t *) (start + 53)) = 2;
- // KtiFpgaEnable
- *((uint8_t *) (start + 55)) = 0;
- *((uint8_t *) (start + 56)) = 0;
-}