diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2022-09-11 14:56:26 +0200 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-09-20 07:52:59 +0000 |
| commit | 84d0fe5113e73d02fd076449c608dd8ee218aac7 (patch) | |
| tree | c945b8d4a6d7fd71246ed3acbf5f36bd4d0c8ef2 | |
| parent | 1caa27932585d809fb3c76384ac32b632db5fdec (diff) | |
cpu/intel/haswell: Hook up Crystal Well µcode updates
Commit 27126f135dad3c0e2f91394e7088b2ff50220146 (cpu/intel/haswell: add
Crystal Well CPU IDs) introduced new Haswell CPUIDs but did not include
any µcode updates for them. It is unknown how this could have worked as
the initial µcode inside the CPU can be quite unstable. Intel CPUs with
support for FIT (Firmware Interface Table) can have their µcode updated
before the x86 reset vector is executed.
The µcode updates for Crystal Well CPUID 0x40661 can be found inside the
intel-microcode submodule. There are no publicly available µcode updates
for Crystal Well CPUID 0x40660 as it is a pre-production stepping, which
is not meant to be used anymore. Hook up the available µcode updates for
Crystal Well CPUs.
Change-Id: If5264f333e681171a2ca4a68be155ffd40a1043b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67525
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
| -rw-r--r-- | src/cpu/intel/haswell/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index 19b268e2ef..8a83eb950b 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -28,4 +28,6 @@ endif else # Haswell Trad cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3c-*) +# Crystal Well (Trad) +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-46-*) endif |