diff options
| author | Edward O'Callaghan <quasisec@google.com> | 2020-07-01 18:49:13 +1000 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2020-07-03 00:03:55 +0000 |
| commit | 8056c910bc49deebd925adc62c180e726b00bdcf (patch) | |
| tree | 1f96ec069086406c711400f566f061e629cc1656 | |
| parent | dc7b94450f2f11589c49c52d1c40359dd70b06bb (diff) | |
mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Noibat
BUG=b:160296662
BRANCH=none
TEST=none
Change-Id: I5298e1779461995a98722099b397692351767089
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42975
Reviewed-by: Sam McNally <sammc@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/google/hatch/variants/noibat/overridetree.cb | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/noibat/overridetree.cb b/src/mainboard/google/hatch/variants/noibat/overridetree.cb index c223bb098c..cac7516000 100644 --- a/src/mainboard/google/hatch/variants/noibat/overridetree.cb +++ b/src/mainboard/google/hatch/variants/noibat/overridetree.cb @@ -74,6 +74,16 @@ chip soc/intel/cannonlake register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 0 register "usb3_ports[5]" = "USB3_PORT_EMPTY" # Type-A Port 4 + # Bitmap for Wake Enable on USB attach/detach + register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(2) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(6)" + register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \ + USB_PORT_WAKE_ENABLE(2) | \ + USB_PORT_WAKE_ENABLE(3) | \ + USB_PORT_WAKE_ENABLE(5)" + # Enable eMMC HS400 register "ScsEmmcHs400Enabled" = "1" |