diff options
| author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2021-06-23 11:11:59 +0800 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-06-30 02:46:26 +0000 |
| commit | 7ade3435dfb1516d8b6c8d8c492159ca84e1f785 (patch) | |
| tree | 4a545e807b816a955f02aa22a531ef1682d70c0c | |
| parent | 9c098e27db231617dd8e727d8bb96a0469bb167a (diff) | |
mb/google/brya: Set GPP_B3 to APIC mode
Set GPP_B3 to APIC mode to avoid PCI IRQ conflict.
BUG=b:181555900
TEST=check dmesg there are no IRQ request errors like below.
genirq: Flags mismatch irq 27. 00002008 (sx932x_event) vs. 00000080 (idma64.1)
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: Idf88fae9e244858445c45e66e26715cebe0c93ad
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55777
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/gpio.c b/src/mainboard/google/brya/variants/baseboard/gpio.c index 589b754244..3800ec0ae5 100644 --- a/src/mainboard/google/brya/variants/baseboard/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/gpio.c @@ -58,7 +58,7 @@ static const struct pad_config gpio_table[] = { /* B2 : VRALERT# ==> M2_SSD_PLA_L */ PAD_CFG_GPO(GPP_B2, 1, PLTRST), /* B3 : PROC_GP2 ==> SAR2_INT_L */ - PAD_CFG_GPI_INT(GPP_B3, NONE, PLTRST, LEVEL), + PAD_CFG_GPI_APIC(GPP_B3, NONE, PLTRST, LEVEL, NONE), /* B4 : PROC_GP3 ==> SSD_PERST_L */ PAD_CFG_GPO(GPP_B4, 1, DEEP), /* B5 : ISH_I2C0_SDA ==> PCH_I2C_MISC_SDA */ |