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authorMathew King <mathewk@chromium.org>2021-03-05 09:04:44 -0700
committerMartin Roth <martinroth@google.com>2021-03-10 23:49:11 +0000
commit78f0301ba4ed5b01501233061a57737ba004a3dc (patch)
tree1255b5fe4c6525af57bab73119ab8a82128311e1
parentc519bff9c15ebefd790f844921b314bcf080bdcc (diff)
mb/google/guybrush: Add chomeec device to lpc bridge
BUG=b:180507937 TEST=builds Signed-off-by: Mathew King <mathewk@chromium.org> Change-Id: I7b8b2ab73d66e0aaa0e9b7570661c885f7f777ca Reviewed-on: https://review.coreboot.org/c/coreboot/+/51296 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/guybrush/variants/baseboard/devicetree.cb6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
index db21dd4e26..b688138d73 100644
--- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
@@ -42,5 +42,11 @@ chip soc/amd/cezanne
device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
device ref gfx on end # Internal GPU (GFX)
end
+
+ device ref lpc_bridge on
+ chip ec/google/chromeec
+ device pnp 0c09.0 on end
+ end
+ end
end # domain
end # chip soc/amd/cezanne