mb/google/{eve,glados}: Use <spd.h> and <dram/ddr3.h>

Change-Id: I48b833a3727d4b7d7c50371dbe8f090983d80e36
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82313
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

6 files changed, 28 insertions, 38 deletions

diff --git a/src/mainboard/google/eve/romstage.c b/src/mainboard/google/eve/romstage.c
index 906f98e0bb..31a9461d99 100644
--- a/src/mainboard/google/eve/romstage.c
+++ b/src/mainboard/google/eve/romstage.c
@@ -2,6 +2,7 @@
 
 #include <acpi/acpi.h>
 #include <boardid.h>
+#include <device/dram/ddr3.h>
 #include <string.h>
 #include <ec/google/chromeec/ec.h>
 #include <fsp/soc_binding.h>
@@ -37,7 +38,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 
 	mem_cfg->MemorySpdPtr00 = mainboard_get_spd_data();
 	mem_cfg->MemorySpdPtr10 = mem_cfg->MemorySpdPtr00;
-	mem_cfg->MemorySpdDataLen = SPD_LEN;
+	mem_cfg->MemorySpdDataLen = SPD_SIZE_MAX_DDR3;
 
 	/* Limit K4EBE304EB-EGCF memory to 1600MHz for stability */
 	if (board_id() < 6 && mainboard_get_spd_index() == 5) {
diff --git a/src/mainboard/google/eve/spd/spd.c b/src/mainboard/google/eve/spd/spd.c
index c053177d55..2f0d2e4218 100644
--- a/src/mainboard/google/eve/spd/spd.c
+++ b/src/mainboard/google/eve/spd/spd.c
@@ -2,8 +2,10 @@
 
 #include <cbfs.h>
 #include <console/console.h>
+#include <device/dram/ddr3.h>
 #include <gpio.h>
 #include <soc/romstage.h>
+#include <spd.h>
 #include <string.h>
 
 #include "../gpio.h"
@@ -18,7 +20,7 @@ static void mainboard_print_spd_info(uint8_t spd[])
 	const int spd_ranks[8] = {  1,  2,  3,  4, -1, -1, -1, -1 };
 	const int spd_devw[8]  = {  4,  8, 16, 32, -1, -1, -1, -1 };
 	const int spd_busw[8]  = {  8, 16, 32, 64, -1, -1, -1, -1 };
-	char spd_name[SPD_PART_LEN+1] = { 0 };
+	char spd_name[SPD_DDR3_PART_LEN + 1] = { 0 };
 
 	int banks = spd_banks[(spd[SPD_DENSITY_BANKS] >> 4) & 7];
 	int capmb = spd_capmb[spd[SPD_DENSITY_BANKS] & 7] * 256;
@@ -30,21 +32,21 @@ static void mainboard_print_spd_info(uint8_t spd[])
 
 	/* Module type */
 	printk(BIOS_INFO, "SPD: module type is ");
-	switch (spd[SPD_DRAM_TYPE]) {
-	case SPD_DRAM_DDR3:
+	switch (spd[SPD_MEMORY_TYPE]) {
+	case SPD_MEMORY_TYPE_SDRAM_DDR3:
 		printk(BIOS_INFO, "DDR3\n");
 		break;
-	case SPD_DRAM_LPDDR3:
+	case SPD_MEMORY_TYPE_LPDDR3_INTEL:
 		printk(BIOS_INFO, "LPDDR3\n");
 		break;
 	default:
-		printk(BIOS_INFO, "Unknown (%02x)\n", spd[SPD_DRAM_TYPE]);
+		printk(BIOS_INFO, "Unknown (%02x)\n", spd[SPD_MEMORY_TYPE]);
 		break;
 	}
 
 	/* Module Part Number */
-	memcpy(spd_name, &spd[SPD_PART_OFF], SPD_PART_LEN);
-	spd_name[SPD_PART_LEN] = 0;
+	memcpy(spd_name, &spd[SPD_DDR3_PART_NUM], SPD_DDR3_PART_LEN);
+	spd_name[SPD_DDR3_PART_LEN] = 0;
 	printk(BIOS_INFO, "SPD: module part is %s\n", spd_name);
 
 	printk(BIOS_INFO,
@@ -86,16 +88,16 @@ uintptr_t mainboard_get_spd_data(void)
 		die("SPD data not found.");
 
 	/* make sure we have at least one SPD in the file. */
-	if (spd_file_len < SPD_LEN)
+	if (spd_file_len < SPD_SIZE_MAX_DDR3)
 		die("Missing SPD data.");
 
 	/* Make sure we did not overrun the buffer */
-	if (spd_file_len < ((spd_index + 1) * SPD_LEN)) {
+	if (spd_file_len < ((spd_index + 1) * SPD_SIZE_MAX_DDR3)) {
 		printk(BIOS_ERR, "SPD index override to 1 - old hardware?\n");
 		spd_index = 1;
 	}
 
-	spd_index *= SPD_LEN;
+	spd_index *= SPD_SIZE_MAX_DDR3;
 	mainboard_print_spd_info((uint8_t *)(spd_file + spd_index));
 
 	return (uintptr_t)(spd_file + spd_index);
diff --git a/src/mainboard/google/eve/spd/spd.h b/src/mainboard/google/eve/spd/spd.h
index 7b53fd43c0..847160de9c 100644
--- a/src/mainboard/google/eve/spd/spd.h
+++ b/src/mainboard/google/eve/spd/spd.h
@@ -3,18 +3,10 @@
 #ifndef MAINBOARD_SPD_H
 #define MAINBOARD_SPD_H
 
-#define SPD_LEN			256
-
-#define SPD_DRAM_TYPE		2
-#define  SPD_DRAM_DDR3		0x0b
-#define  SPD_DRAM_LPDDR3	0xf1
 #define SPD_DENSITY_BANKS	4
 #define SPD_ADDRESSING		5
 #define SPD_ORGANIZATION	7
 #define SPD_BUS_DEV_WIDTH	8
-#define SPD_PART_OFF		128
-#define  SPD_PART_LEN		18
-#define SPD_MANU_OFF		148
 
 int mainboard_get_spd_index(void);
 uintptr_t mainboard_get_spd_data(void);
diff --git a/src/mainboard/google/glados/romstage.c b/src/mainboard/google/glados/romstage.c
index 35b53e26af..64b363db2c 100644
--- a/src/mainboard/google/glados/romstage.c
+++ b/src/mainboard/google/glados/romstage.c
@@ -2,6 +2,7 @@
 
 #include <acpi/acpi.h>
 #include <baseboard/variant.h>
+#include <device/dram/ddr3.h>
 #include <ec/google/chromeec/ec.h>
 #include <gpio.h>
 #include <soc/romstage.h>
@@ -30,7 +31,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 	};
 	const int spd_idx = gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios));
 
-	mem_cfg->MemorySpdDataLen = SPD_LEN;
+	mem_cfg->MemorySpdDataLen = SPD_SIZE_MAX_DDR3;
 	mem_cfg->DqPinsInterleaved = FALSE;
 
 	spd_memory_init_params(mupd, spd_idx);
diff --git a/src/mainboard/google/glados/spd/spd.c b/src/mainboard/google/glados/spd/spd.c
index a6e655bbef..edbedffa65 100644
--- a/src/mainboard/google/glados/spd/spd.c
+++ b/src/mainboard/google/glados/spd/spd.c
@@ -2,8 +2,10 @@
 
 #include <cbfs.h>
 #include <console/console.h>
+#include <device/dram/ddr3.h>
 #include <gpio.h>
 #include <soc/romstage.h>
+#include <spd.h>
 #include <string.h>
 #include <baseboard/variant.h>
 
@@ -19,7 +21,7 @@ static void mainboard_print_spd_info(uint8_t spd[])
 	const int spd_ranks[8] = {  1,  2,  3,  4, -1, -1, -1, -1 };
 	const int spd_devw[8]  = {  4,  8, 16, 32, -1, -1, -1, -1 };
 	const int spd_busw[8]  = {  8, 16, 32, 64, -1, -1, -1, -1 };
-	char spd_name[SPD_PART_LEN+1] = { 0 };
+	char spd_name[SPD_DDR3_PART_LEN + 1] = { 0 };
 
 	int banks = spd_banks[(spd[SPD_DENSITY_BANKS] >> 4) & 7];
 	int capmb = spd_capmb[spd[SPD_DENSITY_BANKS] & 7] * 256;
@@ -31,21 +33,21 @@ static void mainboard_print_spd_info(uint8_t spd[])
 
 	/* Module type */
 	printk(BIOS_INFO, "SPD: module type is ");
-	switch (spd[SPD_DRAM_TYPE]) {
-	case SPD_DRAM_DDR3:
+	switch (spd[SPD_MEMORY_TYPE]) {
+	case SPD_MEMORY_TYPE_SDRAM_DDR3:
 		printk(BIOS_INFO, "DDR3\n");
 		break;
-	case SPD_DRAM_LPDDR3:
+	case SPD_MEMORY_TYPE_LPDDR3_INTEL:
 		printk(BIOS_INFO, "LPDDR3\n");
 		break;
 	default:
-		printk(BIOS_INFO, "Unknown (%02x)\n", spd[SPD_DRAM_TYPE]);
+		printk(BIOS_INFO, "Unknown (%02x)\n", spd[SPD_MEMORY_TYPE]);
 		break;
 	}
 
 	/* Module Part Number */
-	memcpy(spd_name, &spd[SPD_PART_OFF], SPD_PART_LEN);
-	spd_name[SPD_PART_LEN] = 0;
+	memcpy(spd_name, &spd[SPD_DDR3_PART_NUM], SPD_DDR3_PART_LEN);
+	spd_name[SPD_DDR3_PART_LEN] = 0;
 	printk(BIOS_INFO, "SPD: module part is %s\n", spd_name);
 
 	printk(BIOS_INFO,
@@ -83,16 +85,16 @@ void spd_memory_init_params(FSPM_UPD *mupd, int spd_index)
 		die("SPD data not found.");
 
 	/* make sure we have at least one SPD in the file. */
-	if (spd_file_len < SPD_LEN)
+	if (spd_file_len < SPD_SIZE_MAX_DDR3)
 		die("Missing SPD data.");
 
 	/* Make sure we did not overrun the buffer */
-	if (spd_file_len < ((spd_index + 1) * SPD_LEN)) {
+	if (spd_file_len < ((spd_index + 1) * SPD_SIZE_MAX_DDR3)) {
 		printk(BIOS_ERR, "SPD index override to 1 - old hardware?\n");
 		spd_index = 1;
 	}
 
-	const size_t spd_offset = spd_index * SPD_LEN;
+	const size_t spd_offset = spd_index * SPD_SIZE_MAX_DDR3;
 	/* Make sure a valid SPD was found */
 	if (spd_file[spd_offset] == 0)
 		die("Invalid SPD data.");
diff --git a/src/mainboard/google/glados/spd/spd.h b/src/mainboard/google/glados/spd/spd.h
index 764958b86a..8e1a5f43c3 100644
--- a/src/mainboard/google/glados/spd/spd.h
+++ b/src/mainboard/google/glados/spd/spd.h
@@ -3,17 +3,9 @@
 #ifndef MAINBOARD_SPD_H
 #define MAINBOARD_SPD_H
 
-#define SPD_LEN			256
-
-#define SPD_DRAM_TYPE		2
-#define  SPD_DRAM_DDR3		0x0b
-#define  SPD_DRAM_LPDDR3	0xf1
 #define SPD_DENSITY_BANKS	4
 #define SPD_ADDRESSING		5
 #define SPD_ORGANIZATION	7
 #define SPD_BUS_DEV_WIDTH	8
-#define SPD_PART_OFF		128
-#define  SPD_PART_LEN		18
-#define SPD_MANU_OFF		148
 
 #endif