diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-05-17 16:18:09 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-20 17:48:29 +0000 |
| commit | 741856f7c8d1364444c98954a7efd67aa8fc5098 (patch) | |
| tree | 495aa9bb95bc9b8f8dd020560845e9cbe1608e8d | |
| parent | 901354b9f0bd9234e092891b8854abd20de48714 (diff) | |
mb/asus/h61m-cs: Switch to overridetree setup
Tested with BUILD_TIMELESS=1, coreboot.rom for the Asus H61M-CS
remains identical when not adding the .config file in it.
Change-Id: I34eb5387fddcb3505c9218b20b706b773e979b0e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54389
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/asus/h61-series/Kconfig | 4 | ||||
| -rw-r--r-- | src/mainboard/asus/h61-series/variants/h61m-cs/overridetree.cb (renamed from src/mainboard/asus/h61-series/variants/h61m-cs/devicetree.cb) | 31 |
2 files changed, 4 insertions, 31 deletions
diff --git a/src/mainboard/asus/h61-series/Kconfig b/src/mainboard/asus/h61-series/Kconfig index 4b656545c7..6b831e48cf 100644 --- a/src/mainboard/asus/h61-series/Kconfig +++ b/src/mainboard/asus/h61-series/Kconfig @@ -33,14 +33,14 @@ config MAINBOARD_PART_NUMBER default "P8H61-M PRO" if BOARD_ASUS_P8H61_M_PRO # TODO: remove once all boards use overridetrees -if BOARD_ASUS_P8H61_M_LX3_R2_0 || BOARD_ASUS_P8H61_M_PRO +if !BOARD_ASUS_P8H61_M_LX config OVERRIDE_DEVICETREE string default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" endif -if !BOARD_ASUS_P8H61_M_LX3_R2_0 && !BOARD_ASUS_P8H61_M_PRO +if BOARD_ASUS_P8H61_M_LX config DEVICETREE string diff --git a/src/mainboard/asus/h61-series/variants/h61m-cs/devicetree.cb b/src/mainboard/asus/h61-series/variants/h61m-cs/overridetree.cb index 3ec5e5fa28..89ef4194b6 100644 --- a/src/mainboard/asus/h61-series/variants/h61m-cs/devicetree.cb +++ b/src/mainboard/asus/h61-series/variants/h61m-cs/overridetree.cb @@ -1,32 +1,10 @@ ## SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/sandybridge - device cpu_cluster 0 on - chip cpu/intel/model_206ax - register "acpi_c1" = "1" - register "acpi_c2" = "3" - register "acpi_c3" = "5" - device lapic 0x0 on end - device lapic 0xacac off end - end - end device domain 0 on subsystemid 0x1043 0x844d inherit - device pci 00.0 on end # Host bridge - device pci 01.0 on end # PCIe Bridge for discrete graphics - device pci 02.0 on end # Internal graphics - chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - register "c2_latency" = "0x0065" + chip southbridge/intel/bd82x6x register "gen1_dec" = "0x000c0291" - register "sata_port_map" = "0x33" - register "spi_lvscc" = "0x2005" - register "spi_uvscc" = "0x2005" - device pci 16.0 on end # Management Engine Interface 1 - device pci 16.1 off end # Management Engine Interface 2 - device pci 16.2 off end # Management Engine IDE-R - device pci 16.3 off end # Management Engine KT - device pci 19.0 off end # Intel Gigabit Ethernet - device pci 1a.0 on end # USB2 EHCI #2 device pci 1b.0 on # High Definition Audio Audio controller subsystemid 0x1043 0x8445 end @@ -40,8 +18,7 @@ chip northbridge/intel/sandybridge end device pci 1c.6 off end # PCIe Port #7 device pci 1c.7 off end # PCIe Port #8 - device pci 1d.0 on end # USB2 EHCI #1 - device pci 1e.0 off end # PCI bridge + device pci 1f.0 on # LPC bridge PCI-LPC bridge chip superio/nuvoton/nct6779d device pnp 2e.1 off end # Parallel @@ -78,10 +55,6 @@ chip northbridge/intel/sandybridge device pnp 2e.16 off end # Deep Sleep end end - device pci 1f.2 on end # SATA Controller 1 - device pci 1f.3 on end # SMBus - device pci 1f.5 off end # SATA Controller 2 - device pci 1f.6 off end # Thermal end end end |