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authorFelix Held <felix-coreboot@felixheld.de>2015-11-10 01:00:47 +0100
committerRonald G. Minnich <rminnich@gmail.com>2015-11-10 01:45:09 +0100
commit69e89f249fc52a11bed569e7c1e9df8c7dc18d0e (patch)
tree36385f5c0d2d4c76aa6f5b10f2362bb38414ae01
parentb65fd3e305eba74d0a7f1b5466b4910710d5e2f3 (diff)
asus/kgpe-d16: fix DIMMSetVoltages
The RAM voltages can be set per socket, which contains two nodes. Only reset the allowed voltages per socket before processing a new socket and not after every node. Change-Id: Ia0e47676c7a3eebd56a17ab6de0e9690bf8cf703 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/12297 Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
-rw-r--r--src/mainboard/asus/kgpe-d16/romstage.c17
1 files changed, 11 insertions, 6 deletions
diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index a718c14754..3a682302bc 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -173,7 +173,7 @@ void DIMMSetVoltages(struct MCTStatStruc *pMCTstat,
uint8_t node;
uint8_t socket;
uint8_t allowed_voltages = 0xf; /* The mainboard VRMs allow 1.15V, 1.25V, 1.35V, and 1.5V */
- uint8_t node_allowed_voltages;
+ uint8_t socket_allowed_voltages = allowed_voltages;
uint32_t set_voltage = 0;
if (get_option(&nvram, "minimum_memory_voltage") == CB_SUCCESS) {
@@ -193,26 +193,31 @@ void DIMMSetVoltages(struct MCTStatStruc *pMCTstat,
for (node = 0; node < MAX_NODES_SUPPORTED; node++) {
socket = node / 2;
- node_allowed_voltages = allowed_voltages;
struct DCTStatStruc *pDCTstat;
pDCTstat = pDCTstatA + node;
+
+ /* reset socket_allowed_voltages before processing each socket */
+ if (!(node % 2))
+ socket_allowed_voltages = allowed_voltages;
+
if (pDCTstat->NodePresent) {
for (dimm = 0; dimm < MAX_DIMMS_SUPPORTED; dimm++) {
if (pDCTstat->DIMMValid & (1 << dimm)) {
- node_allowed_voltages &= pDCTstat->DimmSupportedVoltages[dimm];
+ socket_allowed_voltages &= pDCTstat->DimmSupportedVoltages[dimm];
}
}
}
+ /* set voltage per socket after processing last contained node */
if (pDCTstat->NodePresent && (node % 2)) {
/* Set voltages */
- if (node_allowed_voltages & 0x8) {
+ if (socket_allowed_voltages & 0x8) {
set_voltage = 0x8;
set_ddr3_voltage(socket, 3);
- } else if (node_allowed_voltages & 0x4) {
+ } else if (socket_allowed_voltages & 0x4) {
set_voltage = 0x4;
set_ddr3_voltage(socket, 2);
- } else if (node_allowed_voltages & 0x2) {
+ } else if (socket_allowed_voltages & 0x2) {
set_voltage = 0x2;
set_ddr3_voltage(socket, 1);
} else {