diff options
author | Yu-Ping Wu <yupingso@chromium.org> | 2024-07-25 15:31:06 +0800 |
---|---|---|
committer | Yu-Ping Wu <yupingso@google.com> | 2024-08-03 02:13:30 +0000 |
commit | 6886a62132de38594a5078d5f3192ceed34576f0 (patch) | |
tree | bc3e569968096af7e3b5f1cd54d431674f674e35 | |
parent | 7d57bc8eb3b81ae5fd78de2b2dd28781ff4f3165 (diff) |
arch/arm64/armv8/mmu: Improve log format
Currently we use "%p" to print the address, which results in different
string lengths, depending on the value of the address. To improve
readability of the printed addresses in the log, change the format to
"0x%013lx", so that the length of the printed addresses will be
consistent.
In addition, print the level of the translation table when setting up a
new table.
Example log:
Backing address range [0x0000000000000:0x1000000000000) with new L0 ...
Mapping address range [0x0000000000000:0x0000200000000) as ...
Backing address range [0x0000000000000:0x0008000000000) with new L1 ...
Mapping address range [0x0000000100000:0x0000000130000) as ...
Backing address range [0x0000000000000:0x0000040000000) with new L2
Backing address range [0x0000000000000:0x0000000200000) with new L3
Mapping address range [0x0000000107000:0x0000000108000) as ...
Mapping address range [0x0000000200000:0x0000000300000) as ...
Backing address range [0x0000000000000:0x0000000200000) with new L3 ...
BUG=none
TEST=emerge-geralt coreboot
BRANCH=none
Change-Id: Ib29c201e1b096b9c7cd750d2541923616bc858ac
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83652
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
-rw-r--r-- | src/arch/arm64/armv8/mmu.c | 35 |
1 files changed, 30 insertions, 5 deletions
diff --git a/src/arch/arm64/armv8/mmu.c b/src/arch/arm64/armv8/mmu.c index 0f84146a2b..65d0f92e5d 100644 --- a/src/arch/arm64/armv8/mmu.c +++ b/src/arch/arm64/armv8/mmu.c @@ -11,6 +11,9 @@ #include <arch/mmu.h> #include <console/console.h> +/* 12 hex digits (48 bits VA) plus 1 for exclusive upper bound. */ +#define ADDR_FMT "0x%013lx" + /* This just caches the next free table slot (okay to do since they fill up from * bottom to top and can never be freed up again). It will reset to its initial * value on stage transition, so we still need to check it for UNUSED_DESC. */ @@ -54,6 +57,25 @@ static uint64_t get_block_attr(unsigned long tag) return attr; } +/* Func : table_level_name + * Desc : Get the descriptions table level name from the given size. + */ +static const char *table_level_name(size_t xlat_size) +{ + switch (xlat_size) { + case L0_XLAT_SIZE: + return "L0"; + case L1_XLAT_SIZE: + return "L1"; + case L2_XLAT_SIZE: + return "L2"; + case L3_XLAT_SIZE: + return "L3"; + default: + return ""; + } +} + /* Func : setup_new_table * Desc : Get next free table from TTB and set it up to match old parent entry. */ @@ -66,9 +88,12 @@ static uint64_t *setup_new_table(uint64_t desc, size_t xlat_size) } void *frame_base = (void *)(desc & XLAT_ADDR_MASK); - printk(BIOS_DEBUG, "Backing address range [%p:%p) with new page" - " table @%p\n", frame_base, frame_base + - (xlat_size << BITS_RESOLVED_PER_LVL), next_free_table); + const char *level_name = table_level_name(xlat_size); + printk(BIOS_DEBUG, + "Backing address range [" ADDR_FMT ":" ADDR_FMT ") with new %s table @%p\n", + (uintptr_t)frame_base, + (uintptr_t)frame_base + (xlat_size << BITS_RESOLVED_PER_LVL), + level_name, next_free_table); if (!desc) { memset(next_free_table, 0, GRANULE_SIZE); @@ -213,8 +238,8 @@ void mmu_config_range(void *start, size_t size, uint64_t tag) uint64_t base_addr = (uintptr_t)start; uint64_t temp_size = size; - printk(BIOS_INFO, "Mapping address range [%p:%p) as ", - start, start + size); + printk(BIOS_INFO, "Mapping address range [" ADDR_FMT ":" ADDR_FMT ") as ", + (uintptr_t)start, (uintptr_t)start + size); print_tag(BIOS_INFO, tag); sanity_check(base_addr, temp_size); |