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| author | Felix Held <felix-coreboot@felixheld.de> | 2020-12-04 17:38:46 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-12-06 18:59:53 +0000 |
| commit | 65783fbeb4d2b8180165b36083023f94bdccbdb7 (patch) | |
| tree | 8a36732e4cd150917d051cbfd438c9f1a633f924 | |
| parent | 2f5c7590770f7bbb00f899a1495675083872b0d7 (diff) | |
soc/amd/cezanne: use common TSC and monotonic timer code
Change-Id: I9bc82f1e64f2cf21bfa4bf1ac75d17247208686c
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48306
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/soc/amd/cezanne/Kconfig | 3 | ||||
| -rw-r--r-- | src/soc/amd/cezanne/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/cezanne/timer.c | 7 |
3 files changed, 1 insertions, 10 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 6900ad787a..914384bf9b 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -17,8 +17,7 @@ config SOC_SPECIFIC_OPTIONS select SOC_AMD_COMMON select SOC_AMD_COMMON_BLOCK_NONCAR select SOC_AMD_COMMON_BLOCK_PCI_MMCONF - select NO_MONOTONIC_TIMER # TODO: replace - select UNKNOWN_TSC_RATE # TODO: replace + select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H config EARLY_RESERVED_DRAM_BASE hex diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index d1d8e97099..d4f585fed8 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -7,7 +7,6 @@ bootblock-y += bootblock.c romstage-y += romstage.c ramstage-y += chip.c -ramstage-y += timer.c CPPFLAGS_common += -I$(src)/soc/amd/cezanne/include diff --git a/src/soc/amd/cezanne/timer.c b/src/soc/amd/cezanne/timer.c deleted file mode 100644 index 9054ffd972..0000000000 --- a/src/soc/amd/cezanne/timer.c +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <delay.h> - -void init_timer(void) -{ -} |