diff options
author | Lijian Zhao <lijian.zhao@intel.com> | 2019-01-11 07:54:48 -0800 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2019-01-11 18:59:21 +0000 |
commit | 64925b5128d8ed27bd1780f6cb25805aecc659e6 (patch) | |
tree | 1f82ad27170650310126751cab059b649d07d3c4 | |
parent | dd217362d44f197b08fa69f3c2c14e743e1bc90b (diff) |
soc/mainboard: Update mainboard UART Kconfig
After f5ca922 (Untangle CBFS microcode updates) got merged, all
mainboard using intel apollolake, cannonlake, coffeelake, glk,
kabylake, skylake, icelake and whiskeylake get affected.
Using INTEL_LPSS_UART_FOR_CONSOLE instead of UART_DEBUG
and set default console for each platform.
BUG=N/A
TEST=Build and test on Sarien platform, by default we can still get
console from cbmem, and enable CONSOLE_SERIAL can get logs from UART
port 2.
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Change-Id: I550a00144cff21420537bb161c64e7a132c5d2de
Reviewed-on: https://review.coreboot.org/c/30853
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
-rw-r--r-- | src/mainboard/google/dragonegg/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/google/eve/Kconfig | 4 | ||||
-rw-r--r-- | src/mainboard/google/fizz/Kconfig | 4 | ||||
-rw-r--r-- | src/mainboard/google/glados/Kconfig | 5 | ||||
-rw-r--r-- | src/mainboard/google/hatch/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/google/octopus/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/google/poppy/Kconfig | 4 | ||||
-rw-r--r-- | src/mainboard/google/reef/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/google/sarien/Kconfig | 5 | ||||
-rw-r--r-- | src/mainboard/intel/apollolake_rvp/Kconfig | 3 | ||||
-rw-r--r-- | src/mainboard/intel/glkrvp/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/intel/kunimitsu/Kconfig | 5 | ||||
-rw-r--r-- | src/mainboard/intel/saddlebrook/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/purism/librem_skl/Kconfig | 1 |
14 files changed, 37 insertions, 0 deletions
diff --git a/src/mainboard/google/dragonegg/Kconfig b/src/mainboard/google/dragonegg/Kconfig index 18382d5307..39228f45a9 100644 --- a/src/mainboard/google/dragonegg/Kconfig +++ b/src/mainboard/google/dragonegg/Kconfig @@ -8,6 +8,7 @@ config BOARD_GOOGLE_BASEBOARD_DRAGONEGG select EC_GOOGLE_CHROMEEC_LPC select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select SOC_INTEL_ICELAKE diff --git a/src/mainboard/google/eve/Kconfig b/src/mainboard/google/eve/Kconfig index 7c9833987a..f7fb9c6516 100644 --- a/src/mainboard/google/eve/Kconfig +++ b/src/mainboard/google/eve/Kconfig @@ -15,6 +15,7 @@ config BOARD_SPECIFIC_OPTIONS select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select INTEL_GMA_HAVE_VBT + select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_I2C_TPM_CR50 select MAINBOARD_HAS_TPM2 @@ -75,4 +76,7 @@ config INCLUDE_NHLT_BLOBS select NHLT_RT5663 select NHLT_MAX98927 +config UART_FOR_CONSOLE + int + default 2 endif diff --git a/src/mainboard/google/fizz/Kconfig b/src/mainboard/google/fizz/Kconfig index 26f6f3af3d..1748d894e5 100644 --- a/src/mainboard/google/fizz/Kconfig +++ b/src/mainboard/google/fizz/Kconfig @@ -15,6 +15,7 @@ config BOARD_GOOGLE_BASEBOARD_FIZZ select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select INTEL_GMA_HAVE_VBT + select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select MAINBOARD_USES_FSP2_0 select NO_FADT_8042 @@ -97,4 +98,7 @@ config INCLUDE_NHLT_BLOBS_KARMA select NHLT_DMIC_4CH select NHLT_MAX98357 +config UART_FOR_CONSOLE + int + default 2 endif # BOARD_GOOGLE_BASEBOARD_FIZZ diff --git a/src/mainboard/google/glados/Kconfig b/src/mainboard/google/glados/Kconfig index 05572df98e..b75b726dc1 100644 --- a/src/mainboard/google/glados/Kconfig +++ b/src/mainboard/google/glados/Kconfig @@ -13,6 +13,7 @@ config BOARD_GOOGLE_BASEBOARD_GLADOS select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE select INTEL_GMA_HAVE_VBT if !BOARD_GOOGLE_GLADOS + select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM select MAINBOARD_HAS_TPM1 @@ -96,4 +97,8 @@ config GBB_HWID default "GLADOS TEST 1988" if BOARD_GOOGLE_GLADOS default "LARS TEST 5001" if BOARD_GOOGLE_LARS default "SENTRY TEST 6297" if BOARD_GOOGLE_SENTRY + +config UART_FOR_CONSOLE + int + default 2 endif diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index 214a1b6933..1fe090fdf3 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -9,6 +9,7 @@ config BOARD_GOOGLE_BASEBOARD_HATCH select EC_GOOGLE_CHROMEEC_LPC select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_SPI_TPM_CR50 select MAINBOARD_HAS_TPM2 diff --git a/src/mainboard/google/octopus/Kconfig b/src/mainboard/google/octopus/Kconfig index 15230dcae7..a237741195 100644 --- a/src/mainboard/google/octopus/Kconfig +++ b/src/mainboard/google/octopus/Kconfig @@ -13,6 +13,7 @@ config BOARD_GOOGLE_BASEBOARD_OCTOPUS select EC_GOOGLE_CHROMEEC_LPC select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select SOC_ESPI select MAINBOARD_HAS_SPI_TPM_CR50 diff --git a/src/mainboard/google/poppy/Kconfig b/src/mainboard/google/poppy/Kconfig index 59abe7258c..419b10eb3d 100644 --- a/src/mainboard/google/poppy/Kconfig +++ b/src/mainboard/google/poppy/Kconfig @@ -10,6 +10,7 @@ config BOARD_GOOGLE_BASEBOARD_POPPY select EC_GOOGLE_CHROMEEC_LPC select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select MAINBOARD_USES_FSP2_0 select SOC_INTEL_KABYLAKE @@ -214,4 +215,7 @@ config VBOOT select MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN select VBOOT_LID_SWITCH +config UART_FOR_CONSOLE + int + default 2 endif # BOARD_GOOGLE_BASEBOARD_POPPY diff --git a/src/mainboard/google/reef/Kconfig b/src/mainboard/google/reef/Kconfig index 09b2e613b8..d2240a8397 100644 --- a/src/mainboard/google/reef/Kconfig +++ b/src/mainboard/google/reef/Kconfig @@ -12,6 +12,7 @@ config BOARD_GOOGLE_BASEBOARD_REEF select EC_GOOGLE_CHROMEEC_LPC select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_I2C_TPM_CR50 select MAINBOARD_HAS_TPM2 diff --git a/src/mainboard/google/sarien/Kconfig b/src/mainboard/google/sarien/Kconfig index 5bf4824d57..ff2f678831 100644 --- a/src/mainboard/google/sarien/Kconfig +++ b/src/mainboard/google/sarien/Kconfig @@ -11,6 +11,7 @@ config BOARD_GOOGLE_BASEBOARD_SARIEN select GENERIC_SPD_BIN select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_I2C_TPM_CR50 select MAINBOARD_HAS_TPM2 @@ -82,6 +83,10 @@ config MAX_CPUS int default 8 +config UART_FOR_CONSOLE + int + default 2 + config VARIANT_DIR string default "arcada" if BOARD_GOOGLE_ARCADA diff --git a/src/mainboard/intel/apollolake_rvp/Kconfig b/src/mainboard/intel/apollolake_rvp/Kconfig index 4afdf0d742..ed7d77f211 100644 --- a/src/mainboard/intel/apollolake_rvp/Kconfig +++ b/src/mainboard/intel/apollolake_rvp/Kconfig @@ -5,6 +5,7 @@ config BOARD_SPECIFIC_OPTIONS select SOC_INTEL_APOLLOLAKE select BOARD_ROMSIZE_KB_8192 select HAVE_ACPI_TABLES + select INTEL_LPSS_UART_FOR_CONSOLE config MAINBOARD_DIR string @@ -18,4 +19,6 @@ config MAINBOARD_VENDOR string default "Intel" +config UART_FOR_CONSOLE + default 2 endif diff --git a/src/mainboard/intel/glkrvp/Kconfig b/src/mainboard/intel/glkrvp/Kconfig index 948455920a..b3ff2fe226 100644 --- a/src/mainboard/intel/glkrvp/Kconfig +++ b/src/mainboard/intel/glkrvp/Kconfig @@ -7,6 +7,7 @@ config BOARD_INTEL_BASEBOARD_GLKRVP select DRIVERS_I2C_HID select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM select DRIVERS_GENERIC_MAX98357A diff --git a/src/mainboard/intel/kunimitsu/Kconfig b/src/mainboard/intel/kunimitsu/Kconfig index e2a673809c..f4dd4b1057 100644 --- a/src/mainboard/intel/kunimitsu/Kconfig +++ b/src/mainboard/intel/kunimitsu/Kconfig @@ -15,6 +15,7 @@ config BOARD_SPECIFIC_OPTIONS select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE + select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM select SOC_INTEL_SKYLAKE @@ -72,4 +73,8 @@ config GBB_HWID string depends on CHROMEOS default "KUNIMITSU TEST 8819" + +config UART_FOR_CONSOLE + int + default 2 endif diff --git a/src/mainboard/intel/saddlebrook/Kconfig b/src/mainboard/intel/saddlebrook/Kconfig index c8113d27b1..650d4deb88 100644 --- a/src/mainboard/intel/saddlebrook/Kconfig +++ b/src/mainboard/intel/saddlebrook/Kconfig @@ -24,6 +24,7 @@ config BOARD_SPECIFIC_OPTIONS select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE + select INTEL_LPSS_UART_FOR_CONSOLE select SERIRQ_CONTINUOUS_MODE select SKYLAKE_SOC_PCH_H select SOC_INTEL_SKYLAKE diff --git a/src/mainboard/purism/librem_skl/Kconfig b/src/mainboard/purism/librem_skl/Kconfig index d757d1aeed..12d4bcb046 100644 --- a/src/mainboard/purism/librem_skl/Kconfig +++ b/src/mainboard/purism/librem_skl/Kconfig @@ -4,6 +4,7 @@ config BOARD_PURISM_BASEBOARD_LIBREM_SKL select BOARD_ROMSIZE_KB_16384 select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select INTEL_LPSS_UART_FOR_CONSOLE select SOC_INTEL_SKYLAKE # Workaround for EC/KBC IRQ1 select SERIRQ_CONTINUOUS_MODE |