summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorFelix Held <felix-coreboot@felixheld.de>2023-09-28 20:28:40 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-10-02 14:03:16 +0000
commit614568ec5876372e0acb0120e5f397074b0115c8 (patch)
tree74c0b88296962b9be2bff3eef0ed86188b225380
parent89ca4788439ddcdbf60311cae6939211cf463a8c (diff)
soc/amd/common/noncar/cpu: simplify get_reserved_phys_addr_bits
Simplify the code a bit by returning 0 early in the function when the SYSCFG_MSR_SMEE bit isn't set. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Suggested-by: Jeremy Compostella <jeremy.compostella@intel.com> Change-Id: I7536b82d98e55c51105448090d1206e1ed7f62d8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78176 Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/amd/common/block/cpu/noncar/cpu.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/src/soc/amd/common/block/cpu/noncar/cpu.c b/src/soc/amd/common/block/cpu/noncar/cpu.c
index eefd62fcf0..136cb42e0e 100644
--- a/src/soc/amd/common/block/cpu/noncar/cpu.c
+++ b/src/soc/amd/common/block/cpu/noncar/cpu.c
@@ -38,10 +38,9 @@ void set_cstate_io_addr(void)
/* Number of most significant physical address bits reserved for secure memory encryption */
unsigned int get_reserved_phys_addr_bits(void)
{
- if (rdmsr(SYSCFG_MSR).raw & SYSCFG_MSR_SMEE)
- return (cpuid_ebx(CPUID_EBX_MEM_ENCRYPT) &
- CPUID_EBX_MEM_ENCRYPT_ADDR_BITS_MASK) >>
- CPUID_EBX_MEM_ENCRYPT_ADDR_BITS_SHIFT;
- else
+ if (!(rdmsr(SYSCFG_MSR).raw & SYSCFG_MSR_SMEE))
return 0;
+
+ return (cpuid_ebx(CPUID_EBX_MEM_ENCRYPT) & CPUID_EBX_MEM_ENCRYPT_ADDR_BITS_MASK) >>
+ CPUID_EBX_MEM_ENCRYPT_ADDR_BITS_SHIFT;
}