diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2022-04-06 18:28:07 +0200 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-04-27 10:56:47 +0000 |
commit | 5cf02a4ecdcf4c93a281289fa51dff90bdddd36f (patch) | |
tree | 2e540fee843c1c636585b064288528be8606f6a0 | |
parent | fd016126e46509e71b8890e21bf0a29e1d1523b0 (diff) |
lib/hardwaremain.c: Move creating ACPI structs to bootstate hooks
hardwaremain.c is the common ramstage entry to all platforms so move
out ACPI code generation (x86 specific) to boot state hooks.
Another reason to do this is the following:
On some platforms that start in dram it makes little sense to have
separate stages. To reduce the complexity we want to call the ramstage
main function instead of loading a full stage. To make this scheme
more maintainable it makes sense to move out as much functionality
from the 'main' function as possible.
Change-Id: I613b927b9a193fc076ffb1b2a40c617965ce2645
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63414
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/acpi/gnvs.c | 5 | ||||
-rw-r--r-- | src/include/acpi/acpi_gnvs.h | 1 | ||||
-rw-r--r-- | src/lib/hardwaremain.c | 8 | ||||
-rw-r--r-- | src/vendorcode/google/chromeos/chromeos.h | 1 | ||||
-rw-r--r-- | src/vendorcode/google/chromeos/gnvs.c | 6 |
5 files changed, 8 insertions, 13 deletions
diff --git a/src/acpi/gnvs.c b/src/acpi/gnvs.c index 6de345fad1..d1bbb019cc 100644 --- a/src/acpi/gnvs.c +++ b/src/acpi/gnvs.c @@ -2,6 +2,7 @@ #include <acpi/acpi_gnvs.h> #include <acpi/acpigen.h> +#include <bootstate.h> #include <cbmem.h> #include <console/console.h> #include <soc/nvs.h> @@ -11,7 +12,7 @@ static struct global_nvs *gnvs; static void *dnvs; -void acpi_create_gnvs(void) +static void acpi_create_gnvs(void *unused) { const size_t gnvs_size = ALIGN_UP(sizeof(struct global_nvs), sizeof(uint64_t)); const size_t dnvs_size = ALIGN_UP(size_of_dnvs(), sizeof(uint64_t)); @@ -34,6 +35,8 @@ void acpi_create_gnvs(void) gnvs->cbmc = (uintptr_t)cbmem_find(CBMEM_ID_CONSOLE); } +BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_EXIT, acpi_create_gnvs, NULL); + void *acpi_get_gnvs(void) { if (gnvs) diff --git a/src/include/acpi/acpi_gnvs.h b/src/include/acpi/acpi_gnvs.h index ef98b66b51..ef6ec29c9e 100644 --- a/src/include/acpi/acpi_gnvs.h +++ b/src/include/acpi/acpi_gnvs.h @@ -7,7 +7,6 @@ struct global_nvs; -void acpi_create_gnvs(void); size_t size_of_dnvs(void); #if CONFIG(ACPI_SOC_NVS) diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index 4a5b2f790c..e45ac9fe16 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -23,7 +23,6 @@ #include <timer.h> #include <timestamp.h> #include <types.h> -#include <vendorcode/google/chromeos/chromeos.h> #include <version.h> static boot_state_t bs_pre_device(void *arg); @@ -462,13 +461,6 @@ void main(void) /* Handoff sleep type from romstage. */ acpi_is_wakeup_s3(); - /* Initialise GNVS early. */ - if (CONFIG(ACPI_SOC_NVS)) - acpi_create_gnvs(); - - if (CONFIG(CHROMEOS_NVS)) - chromeos_init_chromeos_acpi(); - /* Schedule the static boot state entries. */ boot_state_schedule_static_entries(); diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h index cd3b603507..5db78671ce 100644 --- a/src/vendorcode/google/chromeos/chromeos.h +++ b/src/vendorcode/google/chromeos/chromeos.h @@ -26,7 +26,6 @@ void mainboard_prepare_cr50_reset(void); void cbmem_add_vpd_calibration_data(void); void chromeos_set_me_hash(u32*, int); void chromeos_set_ramoops(void *ram_oops, size_t size); -void chromeos_init_chromeos_acpi(void); /** * get_dsm_calibration_from_key - Gets value related to DSM calibration from VPD diff --git a/src/vendorcode/google/chromeos/gnvs.c b/src/vendorcode/google/chromeos/gnvs.c index faaa646b43..3d66aa3f79 100644 --- a/src/vendorcode/google/chromeos/gnvs.c +++ b/src/vendorcode/google/chromeos/gnvs.c @@ -2,7 +2,7 @@ #include <acpi/acpi.h> #include <acpi/acpigen.h> -#include <bootmode.h> +#include <bootstate.h> #include <types.h> #include <string.h> #include <stdlib.h> @@ -32,7 +32,7 @@ static size_t chromeos_vpd_region(const char *region, uintptr_t *base) return region_device_sz(&vpd); } -void chromeos_init_chromeos_acpi(void) +static void chromeos_init_chromeos_acpi(void *unused) { size_t vpd_size; uintptr_t vpd_base = 0; @@ -58,6 +58,8 @@ void chromeos_init_chromeos_acpi(void) } } +BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_EXIT, chromeos_init_chromeos_acpi, NULL); + void chromeos_set_me_hash(u32 *hash, int len) { if ((len*sizeof(u32)) > sizeof(chromeos_acpi->mehh)) |