diff options
| author | Rory Liu <rory.liu@quanta.corp-partner.google.com> | 2021-12-15 11:22:05 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-12-20 17:50:17 +0000 |
| commit | 58ce8b7db04fef9b6753855efd819bed50f29207 (patch) | |
| tree | a0d7e81d73dede201c81e541b047e2aa5ecf8433 | |
| parent | b89c798ddcfe023aa7bc41d433f495f8edb6539e (diff) | |
mb/google/brya/var/brask: Add wake-on-lan function
Add a wake-on-lan GPIO in devicetree for RTL8125.
Modify GPIO A7 for wake-on-lan.
BUG=b:204289108
TEST=emerge-brask coreboot chromeos-bootimage
Signed-off-by: Rory Liu <rory.liu@quanta.corp-partner.google.com>
Change-Id: Ic40301888a138df4a67398485f2a484d69b83fc9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60132
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/brask/gpio.c | 4 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/brask/overridetree.cb | 1 |
2 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c index ffdc285915..5ad8e46bd7 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c @@ -18,8 +18,8 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_A5, NONE), /* A6 : ESPI_ALERT1# ==> TP88 */ PAD_NC(GPP_A6, NONE), - /* A7 : SRCCLK_OE7# ==> NC */ - PAD_NC(GPP_A7, NONE), + /* A7 : SRCCLK_OE7# ==> LAN_WAKE_ODL */ + PAD_CFG_GPI_SCI_LOW(GPP_A7, NONE, DEEP, EDGE_SINGLE), /* A8 : SRCCLKREQ7# ==> CLKREQ_7 */ PAD_NC(GPP_A8, NONE), /* A9 : ESPI_CLK ==> ESPI_CLK */ diff --git a/src/mainboard/google/brya/variants/brask/overridetree.cb b/src/mainboard/google/brya/variants/brask/overridetree.cb index a7b763f774..d1931cf361 100644 --- a/src/mainboard/google/brya/variants/brask/overridetree.cb +++ b/src/mainboard/google/brya/variants/brask/overridetree.cb @@ -95,6 +95,7 @@ chip soc/intel/alderlake register "stop_delay_ms" = "12" # NIC needs time to quiesce register "stop_off_delay_ms" = "1" register "has_power_resource" = "1" + register "wake" = "GPE0_DW0_07" device pci 00.0 on end end end # RTL8125 Ethernet NIC |