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authorMaulik V Vaghela <maulik.v.vaghela@intel.com>2022-06-10 19:55:24 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-06-23 12:19:42 +0000
commit58c063ebd099e94a45da8c0c6ba48b0128a59b03 (patch)
tree9ed101b17b5d45174301050a6ecba017a67de86b
parentefe749f380f2e2a398ad05f6dc0076957273817e (diff)
mb/google/nissa: Skip locking for GPP_F14 GPIO
There is an existing issue for nissa boards where wake up from RTC wake is not working during suspend_stress_test. This issue was root caused to the patch which was setting GPE_EN bits for the GPIOs before locking. Reference: https://review.coreboot.org/c/coreboot/+/64089 Later issue was found to be with GPP_F14 configuration for nissa boards. When coreboot skips setting GPE_EN bit for GPP_F14, RTC wake works properly. Another way to make it work is to skip locking GPP_F14 GPIO to allow kernel to configure it properly. This patch skips the locking for GPP_F14 to allow kernel to configure it later. This fixes the issue of RTC wake not working. Note: This patch provides workaround for the existing issue and BUG will be closed once actual reason is identified and proper fix is available. BUG=b:234097956 BRANCH=None TEST=RTC wake works on Nivviks board with the patch. Change-Id: Ie8091ab8acf2b3f064cb79bdf4700f6b4c1674a5 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65086 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Reka Norman <rekanorman@chromium.org> Reviewed-by: Kangheui Won <khwon@chromium.org>
-rw-r--r--src/mainboard/google/brya/variants/baseboard/nissa/gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c b/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c
index 57dba8b708..18b5d82137 100644
--- a/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c
+++ b/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c
@@ -236,7 +236,7 @@ static const struct pad_config gpio_table[] = {
/* F13 : GSXSLOAD ==> SOC_PEN_DETECT_R_ODL */
PAD_CFG_GPI_INT_LOCK(GPP_F13, NONE, EDGE_BOTH, LOCK_CONFIG),
/* F14 : GSXDIN ==> TCHPAD_INT_ODL */
- PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_F14, NONE, LEVEL, INVERT, LOCK_CONFIG),
+ PAD_CFG_GPI_IRQ_WAKE(GPP_F14, NONE, PWROK, LEVEL, INVERT),
/* F15 : GSXSRESET# ==> SOC_PEN_DETECT_ODL */
PAD_CFG_GPI_SCI_HIGH_LOCK(GPP_F15, NONE, EDGE_BOTH, LOCK_CONFIG),
/* F16 : NC */